Searched refs:Virt2StackSlotMap (Results 1 – 6 of 6) sorted by relevance
65 Virt2StackSlotMap.clear(); in runOnMachineFunction()95 Virt2StackSlotMap.resize(NumRegs); in grow()131 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && in assignVirt2StackSlot()134 return Virt2StackSlotMap[virtReg] = createSpillSlot(RC); in assignVirt2StackSlot()139 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && in assignVirt2StackSlot()144 Virt2StackSlotMap[virtReg] = SS; in assignVirt2StackSlot()371 if (Virt2StackSlotMap[Reg] != VirtRegMap::NO_STACK_SLOT) { in print()372 OS << '[' << PrintReg(Reg, TRI) << " -> fi#" << Virt2StackSlotMap[Reg] in print()
71 IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap; variable147 Virt2StackSlotMap(NO_STACK_SLOT), in VirtRegMap()250 return Virt2StackSlotMap[virtReg]; in getStackSlot()
61 Virt2StackSlotMap.clear(); in runOnMachineFunction()71 Virt2StackSlotMap.resize(NumRegs); in grow()102 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && in assignVirt2StackSlot()105 return Virt2StackSlotMap[virtReg] = createSpillSlot(RC); in assignVirt2StackSlot()110 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && in assignVirt2StackSlot()115 Virt2StackSlotMap[virtReg] = SS; in assignVirt2StackSlot()131 if (Virt2StackSlotMap[Reg] != VirtRegMap::NO_STACK_SLOT) { in print()132 OS << '[' << PrintReg(Reg, TRI) << " -> fi#" << Virt2StackSlotMap[Reg] in print()
59 IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap; variable72 Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) {} in VirtRegMap()166 return Virt2StackSlotMap[virtReg]; in getStackSlot()
57 IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap; variable72 Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) { } in VirtRegMap()170 return Virt2StackSlotMap[virtReg]; in getStackSlot()
70 Virt2StackSlotMap.clear(); in runOnMachineFunction()80 Virt2StackSlotMap.resize(NumRegs); in grow()123 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && in assignVirt2StackSlot()126 return Virt2StackSlotMap[virtReg] = createSpillSlot(RC); in assignVirt2StackSlot()131 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && in assignVirt2StackSlot()136 Virt2StackSlotMap[virtReg] = SS; in assignVirt2StackSlot()152 if (Virt2StackSlotMap[Reg] != VirtRegMap::NO_STACK_SLOT) { in print()153 OS << '[' << printReg(Reg, TRI) << " -> fi#" << Virt2StackSlotMap[Reg] in print()