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/external/arm-neon-tests/
Dref_vcvt.c56 #define TEST_VCVT_FP16(T1, T2, W1, W2, N) \ in exec_vcvt() argument
57 VECT_VAR(vector_res, T1, W1, N) = \ in exec_vcvt()
58 vcvt_##T2##W1##_##T2##W2(VECT_VAR(vector, T1, W2, N)); \ in exec_vcvt()
59 vst1q_##T2##W1(VECT_VAR(result, T1, W1, N), \ in exec_vcvt()
60 VECT_VAR(vector_res, T1, W1, N)); \ in exec_vcvt()
61 DUMP_FP(TEST_MSG, T1, W1, N, PRIx##W1); in exec_vcvt()
63 #define TEST_VCVT_2FP16(T1, T2, W1, W2, N) \ in exec_vcvt() argument
64 VECT_VAR(vector_res, T1, W1, N) = \ in exec_vcvt()
65 vcvt_##T2##W1##_##T2##W2(VECT_VAR(vector, T1, W2, N)); \ in exec_vcvt()
66 vst1_##T2##W1(VECT_VAR(result, T1, W1, N), \ in exec_vcvt()
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/external/honggfuzz/examples/bind/
Dbind-9.13.5-W1.patch1 diff -Nur ORIG.bind-9.13.5-W1/bin/named/main.c bind-9.13.5-W1/bin/named/main.c
2 --- ORIG.bind-9.13.5-W1/bin/named/main.c 2018-12-17 23:27:19.000000000 +0100
3 +++ bind-9.13.5-W1/bin/named/main.c 2019-01-11 17:37:23.537289679 +0100
289 diff -Nur ORIG.bind-9.13.5-W1/compile.sh bind-9.13.5-W1/compile.sh
290 --- ORIG.bind-9.13.5-W1/compile.sh 1970-01-01 01:00:00.000000000 +0100
291 +++ bind-9.13.5-W1/compile.sh 2019-01-11 17:37:23.537289679 +0100
319 diff -Nur ORIG.bind-9.13.5-W1/lib/dns/request.c bind-9.13.5-W1/lib/dns/request.c
320 --- ORIG.bind-9.13.5-W1/lib/dns/request.c 2018-12-17 23:27:19.000000000 +0100
321 +++ bind-9.13.5-W1/lib/dns/request.c 2019-01-11 17:37:23.537289679 +0100
340 diff -Nur ORIG.bind-9.13.5-W1/lib/dns/resolver.c bind-9.13.5-W1/lib/dns/resolver.c
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/external/boringssl/src/crypto/fipsmodule/sha/asm/
Dsha512-armv8.pl339 my ($W0,$W1)=("v16.4s","v17.4s");
369 ld1.32 {$W1},[$Ktbl],#16
377 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
380 ld1.32 {$W1},[$Ktbl],#16
387 add.i32 $W1,$W1,@MSG[1]
389 sha256h $ABCD,$EFGH,$W1
390 sha256h2 $EFGH,$abcd,$W1
392 ld1.32 {$W1},[$Ktbl]
399 add.i32 $W1,$W1,@MSG[3]
401 sha256h $ABCD,$EFGH,$W1
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Dsha256-armv4.pl604 my ($W0,$W1,$ABCD_SAVE,$EFGH_SAVE)=map("q$_",(12..15));
640 vld1.32 {$W1},[$Ktbl]!
648 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG));
651 vld1.32 {$W1},[$Ktbl]!
658 vadd.i32 $W1,$W1,@MSG[1]
660 sha256h $ABCD,$EFGH,$W1
661 sha256h2 $EFGH,$abcd,$W1
663 vld1.32 {$W1},[$Ktbl]
670 vadd.i32 $W1,$W1,@MSG[3]
672 sha256h $ABCD,$EFGH,$W1
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Dsha1-armv8.pl242 my ($W0,$W1)=("v20.4s","v21.4s");
271 add.i32 $W1,@Kxx[0],@MSG[1]
282 sha1$f $ABCD,$E1,$W1
283 add.i32 $W1,@Kxx[$j],@MSG[3]
289 ($E0,$E1)=($E1,$E0); ($W0,$W1)=($W1,$W0);
294 sha1p $ABCD,$E1,$W1
295 add.i32 $W1,@Kxx[$j],@MSG[3]
301 sha1p $ABCD,$E1,$W1
Dsha1-armv4-large.pl615 my ($W0,$W1,$ABCD_SAVE)=map("q$_",(12..14));
653 vadd.i32 $W1,@Kxx[0],@MSG[1]
664 sha1$f $ABCD,$E1,$W1
665 vadd.i32 $W1,@Kxx[$j],@MSG[3]
671 ($E0,$E1)=($E1,$E0); ($W0,$W1)=($W1,$W0);
676 sha1p $ABCD,$E1,$W1
677 vadd.i32 $W1,@Kxx[$j],@MSG[3]
683 sha1p $ABCD,$E1,$W1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/msa/
Df16-llvm-ir.ll53 ; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
54 ; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
81 ; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
82 ; ALL: fexupr.d $w[[W2:[0-9]+]], $w[[W1]]
127 ; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
128 ; ALL: copy_s.w $[[R1:[0-9]+]], $w[[W1]][0]
148 ; ALL: fexupr.d $w[[W6:[0-9]+]], $w[[W1]]
198 ; ALL: fexupr.w $w[[W1:[0-9]+]], $w[[W0]]
199 ; ALL: fexupr.d $w[[W2:[0-9]+]], $w[[W1]]
242 ; ALL-DAG: fexdo.w $w[[W1:[0-9]+]], $w[[W0]], $w[[W0]]
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Dfexuprl.ll15 ; CHECK: fexupl.w $w[[W1:[0-9]+]], $w[[W0]]
16 ; CHECK: st.w $w[[W1]], 0(${{[0-9]+}})
/external/libxaac/decoder/
Dixheaacd_esbr_fft.c103 FLOAT32 W1, W2, W3, W4, W5, W6; in ixheaacd_real_synth_fft_p2() local
167 W1 = *(twiddles + j); in ixheaacd_real_synth_fft_p2()
192 tmp = (FLOAT32)(((FLOAT32)x1r * W1) + ((FLOAT32)x1i * W4)); in ixheaacd_real_synth_fft_p2()
193 x1i = (FLOAT32)(-((FLOAT32)x1r * W4) + (FLOAT32)x1i * W1); in ixheaacd_real_synth_fft_p2()
245 W1 = *(twiddles + j); in ixheaacd_real_synth_fft_p2()
270 tmp = (FLOAT32)(((FLOAT32)x1r * W1) + ((FLOAT32)x1i * W4)); in ixheaacd_real_synth_fft_p2()
271 x1i = (FLOAT32)(-((FLOAT32)x1r * W4) + (FLOAT32)x1i * W1); in ixheaacd_real_synth_fft_p2()
323 W1 = *(twiddles + j); in ixheaacd_real_synth_fft_p2()
348 tmp = (FLOAT32)(((FLOAT32)x1r * W1) + ((FLOAT32)x1i * W4)); in ixheaacd_real_synth_fft_p2()
349 x1i = (FLOAT32)(-((FLOAT32)x1r * W4) + (FLOAT32)x1i * W1); in ixheaacd_real_synth_fft_p2()
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/external/llvm/test/Transforms/BBVectorize/X86/
Dsimple.ll31 %W1 = fadd double %Y1, %Z1
33 %V1 = fadd double %W1, %Z1
35 %Q1 = fadd double %W1, %V1
37 %S1 = fadd double %W1, %Q1
49 ; CHECK: %W1 = fadd <2 x double> %Y1, %Z1
50 ; CHECK: %V1 = fadd <2 x double> %W1, %Z1
51 ; CHECK: %Q1 = fadd <2 x double> %W1, %V1
52 ; CHECK: %S1 = fadd <2 x double> %W1, %Q1
87 %W1 = fadd double %Y2, %Z1
/external/libxaac/decoder/armv8/
Dixheaacd_calcmaxspectralline.s26 LSR W4, W1, #3
48 SUBS W7, W1, W6
51 MOV W1, V3.S[1]
53 ORR W4, W4, W1
/external/dng_sdk/source/
Ddng_color_space.cpp216 dng_vector_3 W1 = M * dng_vector_3 (1.0, 1.0, 1.0); in SetMatrixToPCS() local
219 real64 s0 = W2 [0] / W1 [0]; in SetMatrixToPCS()
220 real64 s1 = W2 [1] / W1 [1]; in SetMatrixToPCS()
221 real64 s2 = W2 [2] / W1 [2]; in SetMatrixToPCS()
/external/clang/test/CodeGenCXX/
Dmicrosoft-abi-rtti.cpp18 struct W1 : virtual V1 {}; struct
19 struct Y1 : W1, virtual V1 {} y1;
/external/llvm/lib/Target/Hexagon/
DHexagonBitTracker.cpp297 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
298 assert(W0 == 64 && W1 == 32); in evaluate()
299 RegisterCell CW = RegisterCell(W0).insert(rc(1), BT::BitMask(0, W1-1)); in evaluate()
300 RegisterCell RC = eADD(eSXT(CW, W1), rc(2)); in evaluate()
626 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
630 RegisterCell RZ = RegisterCell(W0).fill(BX, W1, Zero) in evaluate()
631 .fill(W1+(W1-BX), W0, Zero); in evaluate()
632 RegisterCell BF1 = eXTR(rc(1), 0, BX), BF2 = eXTR(rc(1), BX, W1); in evaluate()
633 RegisterCell RC = eINS(eINS(RZ, BF1, 0), BF2, W1); in evaluate()
754 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonBitTracker.cpp365 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
366 assert(W0 == 64 && W1 == 32); in evaluate()
367 RegisterCell CW = RegisterCell(W0).insert(rc(1), BT::BitMask(0, W1-1)); in evaluate()
368 RegisterCell RC = eADD(eSXT(CW, W1), rc(2)); in evaluate()
694 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
698 RegisterCell RZ = RegisterCell(W0).fill(BX, W1, Zero) in evaluate()
699 .fill(W1+(W1-BX), W0, Zero); in evaluate()
700 RegisterCell BF1 = eXTR(rc(1), 0, BX), BF2 = eXTR(rc(1), BX, W1); in evaluate()
701 RegisterCell RC = eINS(eINS(RZ, BF1, 0), BF2, W1); in evaluate()
823 uint16_t W1 = getRegBitWidth(Reg[1]); in evaluate() local
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/external/syzkaller/pkg/ifuzz/gen/
Dall-enc-instructions.txt15751 PATTERN: XOPV 0xA2 VNP W1 VL128 XMAP8 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() SE_IMM8()
15754 PATTERN: XOPV 0xA2 VNP W1 VL128 XMAP8 MOD[0b11] MOD=3 REG[rrr] RM[nnn] SE_IMM8()
15763 PATTERN: XOPV 0xA2 VNP W1 VL256 XMAP8 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() SE_IMM8()
15766 PATTERN: XOPV 0xA2 VNP W1 VL256 XMAP8 MOD[0b11] MOD=3 REG[rrr] RM[nnn] SE_IMM8()
15783 PATTERN: XOPV 0xA3 VNP W1 VL128 XMAP8 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() SE_IMM8()
15786 PATTERN: XOPV 0xA3 VNP W1 VL128 XMAP8 MOD[0b11] MOD=3 REG[rrr] RM[nnn] SE_IMM8()
16127 PATTERN: XOPV 0x90 VNP W1 VL128 XMAP9 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
16130 PATTERN: XOPV 0x90 VNP W1 VL128 XMAP9 MOD[0b11] MOD=3 REG[rrr] RM[nnn]
16147 PATTERN: XOPV 0x91 VNP W1 VL128 XMAP9 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM()
16150 PATTERN: XOPV 0x91 VNP W1 VL128 XMAP9 MOD[0b11] MOD=3 REG[rrr] RM[nnn]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Darmv8.4a-ldst-error.s9 STLURB W1, [XZR, #1]
11 STLURB W1, [X10, #-257]
Darmv8.4a-ldst.s9 STLURB W1, [X10]
10 STLURB W1, [X10, #-256]
/external/llvm/test/CodeGen/AArch64/
Darm64-dead-register-def-bug.ll6 ; E.g. %X1<def, dead> = MOVi64imm 2, %W1<imp-def>; %X1:GPR64, %W1:GPR32
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Support/
DBinaryStreamWriter.cpp78 BinaryStreamWriter W1{First}; in split() local
80 return std::make_pair(W1, W2); in split()
/external/bouncycastle/repackaged/bcprov/src/main/java/com/android/org/bouncycastle/util/
DStrings.java110 char W1 = ch; in toUTF8ByteArray() local
115 if (W1 > 0xDBFF) in toUTF8ByteArray()
119 int codePoint = (((W1 & 0x03FF) << 10) | (W2 & 0x03FF)) + 0x10000; in toUTF8ByteArray()
/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/util/
DStrings.java108 char W1 = ch; in toUTF8ByteArray() local
113 if (W1 > 0xDBFF) in toUTF8ByteArray()
117 int codePoint = (((W1 & 0x03FF) << 10) | (W2 & 0x03FF)) + 0x10000; in toUTF8ByteArray()
/external/llvm/lib/Target/AArch64/
DAArch64CallingConvention.td56 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
66 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
101 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
104 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
145 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
150 [W0, W1, W2, W3, W4, W5, W6]>>>,
155 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
213 CCIfType<[i32], CCAssignToRegWithShadow<[W0, W1, W2, W3, W4, W5, W6, W7],
216 [W0, W1, W2, W3, W4, W5, W6, W7]>>,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/
DBPFCallingConv.td38 CCIfType<[i32], CCAssignToRegWithShadow<[W1, W2, W3, W4, W5],
43 [W1, W2, W3, W4, W5]>>,
/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/math/ec/
DECPoint.java774 ECFieldElement W1 = X1.multiply(C), W2 = X2.multiply(C); in add() local
775 ECFieldElement A1 = W1.subtract(W2).multiply(Y1); in add()
777 X3 = dy.square().subtract(W1).subtract(W2); in add()
778 Y3 = W1.subtract(X3).multiply(dy).subtract(A1); in add()
1168 ECFieldElement W1 = curve.getA(); in timesPow2() local
1182 W1 = calculateJacobianModifiedW(Z1, Z1Sq); in timesPow2()
1185 W1 = calculateJacobianModifiedW(Z1, null); in timesPow2()
1188 W1 = getJacobianModifiedW(); in timesPow2()
1210 if (!W1.isZero()) in timesPow2()
1212 M = M.add(W1); in timesPow2()
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