| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ADT/ |
| D | APInt.h | 71 typedef uint64_t WordType; typedef
76 APINT_WORD_SIZE = sizeof(WordType),
87 static const WordType WORD_MAX = ~WordType(0);
191 static void divide(const WordType *LHS, unsigned lhsWords,
192 const WordType *RHS, unsigned rhsWords, WordType *Quotient,
193 WordType *Remainder);
428 return U.VAL == ((WordType(1) << (BitWidth - 1)) - 1); in isMaxSignedValue()
444 return U.VAL == (WordType(1) << (BitWidth - 1)); in isMinSignedValue()
1398 WordType Mask = maskBit(BitPosition); in setBit()
1457 WordType Mask = ~maskBit(BitPosition); in clearBit()
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| D | APFloat.h | 143 typedef APInt::WordType integerPart;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Support/ |
| D | APInt.cpp | 1407 void APInt::divide(const WordType *LHS, unsigned lhsWords, const WordType *RHS, in divide()
1408 unsigned rhsWords, WordType *Quotient, WordType *Remainder) { in divide()
2163 static inline APInt::WordType lowBitMask(unsigned bits) { in lowBitMask()
2166 return ~(APInt::WordType) 0 >> (APInt::APINT_BITS_PER_WORD - bits); in lowBitMask()
2170 static inline APInt::WordType lowHalf(APInt::WordType part) { in lowHalf()
2175 static inline APInt::WordType highHalf(APInt::WordType part) { in highHalf()
2181 static unsigned partMSB(APInt::WordType value) { in partMSB()
2187 static unsigned partLSB(APInt::WordType value) { in partLSB()
2193 void APInt::tcSet(WordType *dst, WordType part, unsigned parts) { in tcSet()
2202 void APInt::tcAssign(WordType *dst, const WordType *src, unsigned parts) { in tcAssign()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | LowerEmuTLS.cpp | 115 IntegerType *WordType = DL.getIntPtrType(C); in addEmuTlsVar() local
118 Type *ElementTypes[4] = {WordType, WordType, VoidPtrType, InitPtrType}; in addEmuTlsVar()
152 ConstantInt::get(WordType, DL.getTypeStoreSize(GVType)), in addEmuTlsVar()
153 ConstantInt::get(WordType, GVAlignment), in addEmuTlsVar()
160 DL.getABITypeAlignment(WordType), in addEmuTlsVar()
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| D | AtomicExpandPass.cpp | 575 Type *WordType; member
618 Ret.WordType = Type::getIntNTy(Ctx, WordSize * 8); in createMaskInstrs()
621 Ret.WordType->getPointerTo(Addr->getType()->getPointerAddressSpace()); in createMaskInstrs()
638 Ret.ShiftAmt = Builder.CreateTrunc(Ret.ShiftAmt, Ret.WordType, "ShiftAmt"); in createMaskInstrs()
640 ConstantInt::get(Ret.WordType, (1 << ValueSize * 8) - 1), Ret.ShiftAmt, in createMaskInstrs()
687 Builder.CreateZExt(NewVal, PMV.WordType), PMV.ShiftAmt); in performMaskedAtomicOp()
717 Builder.CreateShl(Builder.CreateZExt(AI->getValOperand(), PMV.WordType), in expandPartwordAtomicRMW()
728 insertRMWCmpXchgLoop(Builder, PMV.WordType, PMV.AlignedAddr, MemOpOrder, in expandPartwordAtomicRMW()
799 Builder.CreateShl(Builder.CreateZExt(NewVal, PMV.WordType), PMV.ShiftAmt); in expandPartwordCmpXchg()
801 Builder.CreateShl(Builder.CreateZExt(Cmp, PMV.WordType), PMV.ShiftAmt); in expandPartwordCmpXchg()
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| /external/llvm/lib/CodeGen/ |
| D | LowerEmuTLS.cpp | 113 IntegerType *WordType = DL.getIntPtrType(C); in addEmuTlsVar() local
116 Type *ElementTypes[4] = {WordType, WordType, VoidPtrType, InitPtrType}; in addEmuTlsVar()
150 ConstantInt::get(WordType, DL.getTypeStoreSize(GVType)), in addEmuTlsVar()
151 ConstantInt::get(WordType, GVAlignment), in addEmuTlsVar()
158 DL.getABITypeAlignment(WordType), in addEmuTlsVar()
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| D | AtomicExpandPass.cpp | 565 Type *WordType; member
608 Ret.WordType = Type::getIntNTy(Ctx, WordSize * 8); in createMaskInstrs()
611 Ret.WordType->getPointerTo(Addr->getType()->getPointerAddressSpace()); in createMaskInstrs()
628 Ret.ShiftAmt = Builder.CreateTrunc(Ret.ShiftAmt, Ret.WordType, "ShiftAmt"); in createMaskInstrs()
630 ConstantInt::get(Ret.WordType, (1 << ValueSize * 8) - 1), Ret.ShiftAmt, in createMaskInstrs()
677 Builder.CreateZExt(NewVal, PMV.WordType), PMV.ShiftAmt); in performMaskedAtomicOp()
708 Builder.CreateShl(Builder.CreateZExt(AI->getValOperand(), PMV.WordType), in expandPartwordAtomicRMW()
719 insertRMWCmpXchgLoop(Builder, PMV.WordType, PMV.AlignedAddr, MemOpOrder, in expandPartwordAtomicRMW()
790 Builder.CreateShl(Builder.CreateZExt(NewVal, PMV.WordType), PMV.ShiftAmt); in expandPartwordCmpXchg()
792 Builder.CreateShl(Builder.CreateZExt(Cmp, PMV.WordType), PMV.ShiftAmt); in expandPartwordCmpXchg()
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| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/ADT/ |
| D | APIntTest.cpp | 568 APInt::WordType E2[4] = { in TEST()
1470 APInt::WordType singleWord = ~APInt::WordType(0) << (APInt::APINT_BITS_PER_WORD - 1); in TEST()
1471 APInt::WordType carry = APInt::tcDecrement(&singleWord, 1); in TEST()
1472 EXPECT_EQ(carry, APInt::WordType(0)); in TEST()
1473 EXPECT_EQ(singleWord, ~APInt::WordType(0) >> 1); in TEST()
1478 APInt::WordType singleWord = 0; in TEST()
1479 APInt::WordType carry = APInt::tcDecrement(&singleWord, 1); in TEST()
1480 EXPECT_EQ(carry, APInt::WordType(1)); in TEST()
1481 EXPECT_EQ(singleWord, ~APInt::WordType(0)); in TEST()
1488 APInt::WordType test[4] = {0x1, 0x1, 0x1, 0x1}; in TEST()
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| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenDAGPatterns.h | 59 using WordType = uint64_t; member
60 static unsigned constexpr WordWidth = CHAR_BIT*sizeof(WordType);
73 for (WordType W : Words) in size()
79 std::memset(Words.data(), 0, NumWords*sizeof(WordType)); in clear()
83 for (WordType W : Words) in empty()
94 Words[T.SimpleTy / WordWidth] |= WordType(1) << (T.SimpleTy % WordWidth); in insert()
104 Words[T.SimpleTy / WordWidth] &= ~(WordType(1) << (T.SimpleTy % WordWidth)); in erase()
150 WordType W = Set->Words[SkipWords]; in find_from_pos()
151 W &= maskLeadingOnes<WordType>(WordWidth-SkipBits); in find_from_pos()
159 WordType W = Set->Words[i]; in find_from_pos()
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringX8664.cpp | 236 getPhysicalRegister(Traits::RegisterSet::Reg_rsp, Traits::WordType); in _link_bp()
240 getPhysicalRegister(Traits::RegisterSet::Reg_rbp, Traits::WordType); in _link_bp()
242 getPhysicalRegister(Traits::RegisterSet::Reg_r15, Traits::WordType); in _link_bp()
297 getPhysicalRegister(Traits::RegisterSet::Reg_rbp, Traits::WordType); in _push_reg()
501 getPhysicalRegister(Traits::RegisterSet::Reg_rsp, Traits::WordType); in _sub_sp()
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| D | IceTargetLoweringX86BaseImpl.h | 973 const Type FrameSPTy = Traits::WordType;
1095 PreservedRegsSizeBytes += typeWidthInBytes(Traits::WordType);
1096 _push_reg(getPhysicalRegister(RegNum, Traits::WordType));
1104 PreservedRegsSizeBytes += typeWidthInBytes(Traits::WordType);
1169 _and(getPhysicalRegister(getStackReg(), Traits::WordType),
1184 Variable *FramePtr = getPhysicalRegister(FrameOrStackReg, Traits::WordType);
1211 if (Traits::getRegisterForGprArgNum(Traits::WordType, NumGPRArgs)
1362 _pop(getPhysicalRegister(RegNum, Traits::WordType));
1377 return Traits::WordType;
1484 Variable *esp = getPhysicalRegister(getStackReg(), Traits::WordType);
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| D | IceTargetLoweringX86Base.h | 164 const uint32_t WordSizeInBytes = typeWidthInBytes(Traits::WordType); in typeWidthInBytesOnStack()
394 Func->getTarget()->getPhysicalRegister(getStackReg(), Traits::WordType); in keepEspLiveAtExit()
1083 size_t RequiredStackAlignment = sizeof(Traits::WordType);
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| D | IceTargetLoweringX8632Traits.h | 277 static constexpr Type WordType = IceType_i32; member
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| D | IceTargetLoweringX8664Traits.h | 302 static constexpr Type WordType = IceType_i64; member
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| D | IceAssemblerARM32.cpp | 32 using WordType = uint32_t; typedef
33 static constexpr IValueT kWordSize = sizeof(WordType);
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