Searched refs:WriteSequences (Results 1 – 4 of 4) sorted by relevance
| /external/llvm/utils/TableGen/ |
| D | CodeGenSchedule.cpp | 941 SmallVector<SmallVector<unsigned,4>, 16> WriteSequences; member
1033 WSI = PTI->WriteSequences.begin(), WSE = PTI->WriteSequences.end(); in hasVariant()
1172 ? Trans.ReadSequences : Trans.WriteSequences; in pushVariant()
1234 TransVec[TransIdx].WriteSequences.back().push_back(*RWI); in substituteVariantOperand()
1268 WSI = Trans.WriteSequences.begin(), WSE = Trans.WriteSequences.end(); in substituteVariants()
1273 I->WriteSequences.resize(I->WriteSequences.size() + 1); in substituteVariants()
1300 WSI = I->WriteSequences.begin(), WSE = I->WriteSequences.end(); in inferFromTransitions()
1352 unsigned Idx = LastTransitions[0].WriteSequences.size(); in inferFromRW()
1353 LastTransitions[0].WriteSequences.resize(Idx + 1); in inferFromRW()
1354 SmallVectorImpl<unsigned> &Seq = LastTransitions[0].WriteSequences[Idx]; in inferFromRW()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenSchedule.cpp | 1045 SmallVector<SmallVector<unsigned,4>, 16> WriteSequences; member
1131 for (const SmallVectorImpl<unsigned> &WSI : PTI.WriteSequences) in hasVariant()
1258 ? Trans.ReadSequences : Trans.WriteSequences; in pushVariant()
1317 TransVec[TransIdx].WriteSequences.back().push_back(*RWI); in substituteVariantOperand()
1351 WSI = Trans.WriteSequences.begin(), WSE = Trans.WriteSequences.end(); in substituteVariants()
1356 I->WriteSequences.emplace_back(); in substituteVariants()
1382 transform(I->WriteSequences, std::back_inserter(OperWritesVariant), in inferFromTransitions()
1429 LastTransitions[0].WriteSequences.emplace_back(); in inferFromRW()
1430 SmallVectorImpl<unsigned> &Seq = LastTransitions[0].WriteSequences.back(); in inferFromRW()
1947 WSI = TI->WriteSequences.begin(), WSE = TI->WriteSequences.end(); in dump()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMScheduleA9.td | 2136 // so can be used in WriteSequences for in single-issue instructions that
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMScheduleA9.td | 2112 // so can be used in WriteSequences for in single-issue instructions that
|