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/external/libxaac/decoder/armv8/
Dixheaacd_overlap_add2.s29 stp X12, X13, [sp, #-16]!
38 ldp X12, X13, [sp], #16
53 SUB X12, X5, #1
55 LSL X12, X12, #2
57 ADD X7, X1, X12
63 MOV X12, #-16
68 LD2 {V6.4H, V7.4H}, [X7], X12
85 LD2 {V14.4H, V15.4H}, [X7], X12
99 LD2 {V6.4H, V7.4H}, [X7], X12
120 LD2 {V14.4H, V15.4H}, [X7], X12
[all …]
Dixheaacd_sbr_imdct_using_fft.s29 stp X12, X13, [sp, #-16]!
38 ldp X12, X13, [sp], #16
105 ADD X5, X5, X12, LSL #3
116 ADD X6, X6, X12, LSL #3
128 ADD X7, X7, X12, LSL #3
135 ADD X11, X11, X12, LSL #3
447 ADD X5, X5, X12, LSL #3
458 ADD X6, X6, X12, LSL #3
468 ADD X7, X7, X12, LSL #3
476 ADD X11, X11, X12 , LSL #3
[all …]
Dixheaacd_imdct_using_fft.s29 stp X12, X13, [sp, #-16]!
38 ldp X12, X13, [sp], #16
135 ADD X5, X5, X12, LSL #3
146 ADD X6, X6, X12, LSL #3
158 ADD X7, X7, X12, LSL #3
165 ADD X11, X11, X12, LSL #3
491 ADD X5, X5, X12, LSL #3
502 ADD X6, X6, X12, LSL #3
512 ADD X7, X7, X12, LSL #3
520 ADD X11, X11, X12 , LSL #3
[all …]
Dixheaacd_overlap_add1.s28 stp X12, X13, [sp, #-16]!
37 ldp X12, X13, [sp], #16
58 MOV X12, #-16
60 LD1 {V3.4S}, [X10], X12
81 LD2 {V2.4H, V3.4H}, [X8], X12
118 LD1 {V3.4S}, [X10], X12
140 LD2 {V2.4H, V3.4H}, [X8], X12
168 LD1 {V6.4S}, [X10], X12
184 LD2 {V2.4H, V3.4H}, [X8], X12
243 LD1 {V3.4S}, [X10], X12
[all …]
Dixheaacd_shiftrountine_with_round.s4 stp X12, X13, [sp, #-16]!
19 ldp X12, X13, [sp], #16
64 ADD X17, X12, X14
Dixheaacd_shiftrountine_with_round_eld.s4 stp X12, X13, [sp, #-16]!
19 ldp X12, X13, [sp], #16
70 ADD X17, X12, X14
Dixheaacd_postradixcompute4.s5 stp X12, X13, [sp, #-16]!
12 ldp X12, X13, [sp], #16
Dixheaacd_apply_scale_factors.s5 stp X12, X13, [sp, #-16]!
18 ldp X12, X13, [sp], #16
Dixheaacd_no_lap1.s29 stp X12, X13, [sp, #-16]!
38 ldp X12, X13, [sp], #16
Dixheaacd_cos_sin_mod_loop2.s8 stp X12, X13, [sp, #-16]!
22 ldp X12, X13, [sp], #16
Dixheaacd_cos_sin_mod_loop1.s8 stp X12, X13, [sp, #-16]!
22 ldp X12, X13, [sp], #16
Dixheaacd_sbr_qmf_analysis32_neon.s8 stp X12, X13, [sp, #-16]!
17 ldp X12, X13, [sp], #16
Dixheaacd_pre_twiddle.s29 stp X12, X13, [sp, #-16]!
38 ldp X12, X13, [sp], #16
91 SMULL X12, w9, w21
92 ASR X12, x12, #32
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-rc/Inputs/
Dtag-escape.rc5 3 "\x\x1\x12\x123\x1234\x12345\X\X1\X12\X123\X1234\X12345\x1g"
15 23 L"\x\x1\x12\x123\x1234\x12345\X\X1\X12\X123\X1234\X12345\x1g"
27 MENUITEM "\x\x1\x12\x123\x1234\x12345\X\X1\X12\X123\X1234\X12345\x1g", 3
39 MENUITEM L"\x\x1\x12\x123\x1234\x12345\X\X1\X12\X123\X1234\X12345\x1g", 3
51 "\x\x1\x12\x123\x1234\x12345\X\X1\X12\X123\X1234\X12345\x1g",
63 L"\x\x1\x12\x123\x1234\x12345\X\X1\X12\X123\X1234\X12345\x1g",
/external/clang/test/CodeGen/
Doverride-layout.c103 struct PACKED X12 { struct
149 struct X12 x12; in use_structs()
150 x12.x = sizeof(struct X12); in use_structs()
/external/deqp-deps/glslang/Test/
Dpreprocessor.function_macro.vert9 X8, X9, X10, X11, X12) X1+X2+X3+X4+X5+X6+X7+X8+X9+X10+X11+X12
/external/boringssl/src/crypto/fipsmodule/md4/
Dmd4.c139 uint32_t X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15; in md4_block_data_order() local
184 X12 = l; in md4_block_data_order()
188 R0(A, B, C, D, X12, 3, 0); in md4_block_data_order()
200 R1(B, C, D, A, X12, 13, 0x5A827999L); in md4_block_data_order()
217 R2(B, C, D, A, X12, 15, 0x6ED9EBA1L); in md4_block_data_order()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Darmv8.4a-ldst.s133 LDAPUR X12, [X3]
134 LDAPUR X12, [X3, #-256]
Darmv8.4a-ldst-error.s59 LDAPUR X12, [X3, #-257]
/external/clang/test/SemaCXX/
Dnew-delete.cpp222 struct X12 { struct
226 struct X13 : X12 {
227 using X12::operator new;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/ToolDrivers/llvm-dlltool/
DDlltoolDriver.cpp43 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
45 X9, X8, OPT_##GROUP, OPT_##ALIAS, X7, X12},
/external/swiftshader/third_party/llvm-7.0/llvm/lib/ToolDrivers/llvm-lib/
DLibDriver.cpp44 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
46 X9, X8, OPT_##GROUP, OPT_##ALIAS, X7, X12},
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/
DPPCBaseInfo.h43 case R12: case X12: case F12: case V12: case CR3LT: return 12; in getPPCRegisterNumbering()
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h44 case AArch64::X12: return AArch64::W12; in getWRegFromXReg()
84 case AArch64::W12: return AArch64::X12; in getXRegFromWReg()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.h44 case AArch64::X12: return AArch64::W12; in getWRegFromXReg()
84 case AArch64::W12: return AArch64::X12; in getXRegFromWReg()

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