| /external/llvm/unittests/Support/ |
| D | MathExtrasTest.cpp | 19 uint16_t Z16 = 0; in TEST() local
23 EXPECT_EQ(16u, countTrailingZeros(Z16)); in TEST()
39 uint16_t Z16 = 0; in TEST() local
43 EXPECT_EQ(16u, countLeadingZeros(Z16)); in TEST()
71 uint16_t Z16 = 0; in TEST() local
75 EXPECT_EQ(0xFFFFULL, findFirstSet(Z16)); in TEST()
91 uint16_t Z16 = 0; in TEST() local
95 EXPECT_EQ(0xFFFFULL, findLastSet(Z16)); in TEST()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/Support/ |
| D | MathExtrasTest.cpp | 19 uint16_t Z16 = 0; in TEST() local
23 EXPECT_EQ(16u, countTrailingZeros(Z16)); in TEST()
39 uint16_t Z16 = 0; in TEST() local
43 EXPECT_EQ(16u, countLeadingZeros(Z16)); in TEST()
96 uint16_t Z16 = 0; in TEST() local
100 EXPECT_EQ(0xFFFFULL, findFirstSet(Z16)); in TEST()
116 uint16_t Z16 = 0; in TEST() local
120 EXPECT_EQ(0xFFFFULL, findLastSet(Z16)); in TEST()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-cxxdump/ |
| D | eh.test | 134 COFF-I386: __CTA3?AUS@@[0]: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16
187 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[Flags]: 4
188 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[Flags.ScalarType]: false
189 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[Flags.VirtualInheritance]: true
190 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[TypeDescriptor]: ??_R0?AUS@@@8
191 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[NonVirtualBaseAdjustmentOffset]: 0
192 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[VirtualBasePointerOffset]: -1
193 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[VirtualBaseAdjustmentOffset]: 0
194 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[Size]: 16
195 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[CopyCtor]: ??0S@@QAE@ABU0@@Z
|
| /external/llvm/test/tools/llvm-cxxdump/ |
| D | eh.test | 134 COFF-I386: __CTA3?AUS@@[0]: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16
187 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[Flags]: 4
188 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[Flags.ScalarType]: false
189 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[Flags.VirtualInheritance]: true
190 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[TypeDescriptor]: ??_R0?AUS@@@8
191 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[NonVirtualBaseAdjustmentOffset]: 0
192 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[VirtualBasePointerOffset]: -1
193 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[VirtualBaseAdjustmentOffset]: 0
194 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[Size]: 16
195 COFF-I386: __CT??_R0?AUS@@@8??0S@@QAE@ABU0@@Z16[CopyCtor]: ??0S@@QAE@ABU0@@Z
|
| /external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| D | nv30_format.c | 143 Z_(Z16_UNORM , Z16 ),
243 _(Z16_UNORM , Z16 , 0, C, C, C, 1, 3, 3, 3, x, NONE, ____),
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1166 case AArch64::Z15: Reg = AArch64::Z16; break; in getNextVectorRegister()
1167 case AArch64::Z16: Reg = AArch64::Z17; break; in getNextVectorRegister()
|
| /external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| D | nv50_formats.c | 135 ZX(B, Z16_UNORM, Z16_UNORM, R, R, R, xx, UNORM, Z16, TZ),
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 491 AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 749 def Z16 : AArch64Reg<16, "z16", [Q16, Z16_HI]>, DwarfRegNum<[112]>;
|
| /external/mesa3d/src/gallium/docs/source/ |
| D | screen.rst | 340 32-bit. If set to off, that means that a B5G6R5 + Z24 or RGBA8 + Z16
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 281 Z16 = 261,
2603 …h64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArc…
3564 { 112U, AArch64::Z16 },
3681 { 112U, AArch64::Z16 },
3960 { AArch64::Z16, 112U },
4239 { AArch64::Z16, 112U },
|
| D | AArch64GenAsmMatcher.inc | 10897 case AArch64::Z16: OpKind = MCK_ZPR; break;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 2166 .Case("z16", AArch64::Z16) in matchSVEDataVectorRegName()
|