/external/vixl/test/aarch32/ |
D | test-simulator-cond-rdlow-rnlow-operand-immediate-t32.cc | 176 {ZCVFlag, 0x55555555, 0x55555555}, {NCFlag, 0x00000020, 0x00000020}, 199 {ZCVFlag, 0x80000000, 0x80000000}, {NZCFlag, 0xffffffe0, 0xffffffe0}, 203 {ZCVFlag, 0x00007fff, 0x00007fff}, {NZFlag, 0x0000007d, 0x0000007d}, 218 {ZCVFlag, 0xaaaaaaaa, 0xaaaaaaaa}, {NZFlag, 0x00007ffd, 0x00007ffd}, 226 {ZCVFlag, 0x00000000, 0x00000000}, {CFlag, 0xffffff81, 0xffffff81}, 257 {NZCVFlag, 0x33333333, 0x33333333}, {ZCVFlag, 0xfffffffd, 0xfffffffd}, 261 {ZCVFlag, 0xcccccccc, 0xcccccccc}, {VFlag, 0x7ffffffe, 0x7ffffffe}, 267 {CVFlag, 0x00007ffd, 0x00007ffd}, {ZCVFlag, 0x0000007d, 0x0000007d}, 279 {ZFlag, 0x00000002, 0x00000002}, {ZCVFlag, 0xffff8003, 0xffff8003}, 284 {NZVFlag, 0x7ffffffe, 0x7ffffffe}, {ZCVFlag, 0x0000007e, 0x0000007e}, [all …]
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D | test-simulator-cond-rd-rn-operand-rm-t32.cc | 207 {ZCVFlag, 0xabababab, 0xabababab, 0xabababab}, 317 {ZCVFlag, 0x00000020, 0x00000020, 0xaaaaaaaa}, 323 {ZCVFlag, 0x00000001, 0x00000001, 0x7ffffffd}, 324 {ZCVFlag, 0x0000007d, 0x0000007d, 0xaaaaaaaa}, 329 {ZCVFlag, 0x00007ffd, 0x00007ffd, 0xffffffff}, 344 {ZCVFlag, 0x55555555, 0x55555555, 0xfffffffe}, 390 {ZCVFlag, 0xffffffe0, 0xffffffe0, 0x00000001}, 392 {ZCVFlag, 0x7fffffff, 0x7fffffff, 0x55555555}, 396 {ZCVFlag, 0xffffff82, 0xffffff82, 0x7ffffffd}, 413 {ZCVFlag, 0x00000000, 0x00007ffd, 0x00000000}, [all …]
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D | test-utils-aarch32.h | 76 const uint32_t ZCVFlag = ZFlag | CFlag | VFlag; variable
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D | test-simulator-cond-rd-operand-const-a32.cc | 177 {ZCVFlag, 0xabababab},
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D | test-simulator-cond-rd-operand-imm16-t32.cc | 171 {ZCVFlag, 0xabababab},
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D | test-simulator-cond-rd-operand-const-t32.cc | 177 {ZCVFlag, 0xabababab},
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D | test-simulator-cond-rd-operand-rn-ror-amount-a32.cc | 178 {ZCVFlag, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-operand-rn-t32.cc | 184 {ZCVFlag, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-operand-rn-a32.cc | 184 {ZCVFlag, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-operand-rn-ror-amount-t32.cc | 178 {ZCVFlag, 0xabababab, 0xabababab},
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D | test-simulator-cond-rdlow-rnlow-rmlow-t32.cc | 175 {ZCVFlag, 0xabababab, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 180 {ZCVFlag, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 207 {ZCVFlag, 0xabababab, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 180 {ZCVFlag, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc | 180 {ZCVFlag, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc | 180 {ZCVFlag, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-rn-t32.cc | 177 {ZCVFlag, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-rn-operand-rm-ror-amount-a32.cc | 181 {ZCVFlag, 0xabababab, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-rn-operand-rm-ror-amount-t32.cc | 181 {ZCVFlag, 0xabababab, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-rn-a32.cc | 177 {ZCVFlag, 0xabababab, 0xabababab},
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D | test-simulator-cond-rdlow-operand-imm8-t32.cc | 172 {ZCVFlag, 0xabababab},
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D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 195 {ZCVFlag, 0xabababab, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 195 {ZCVFlag, 0xabababab, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-rn-operand-const-a32.cc | 191 {ZCVFlag, 0xabababab, 0xabababab},
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D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 195 {ZCVFlag, 0xabababab, 0xabababab, 0xabababab},
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