Searched refs:Zero64 (Results 1 – 5 of 5) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 2364 unsigned Zero64 = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass); in legalizeOperands() local
2371 BuildMI(MBB, MI, MI.getDebugLoc(), get(AMDGPU::S_MOV_B64), Zero64) in legalizeOperands()
2384 .addReg(Zero64) in legalizeOperands()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 3644 unsigned Zero64 = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass); in legalizeOperands() local
3651 BuildMI(MBB, MI, MI.getDebugLoc(), get(AMDGPU::S_MOV_B64), Zero64) in legalizeOperands()
3664 .addReg(Zero64) in legalizeOperands()
|
| D | AMDGPUISelLowering.cpp | 1613 SDValue Zero64 = DAG.getConstant(0, DL, VT); in LowerUDIVREM64() local
1618 SDValue Neg_RHS = DAG.getNode(ISD::SUB, DL, VT, Zero64, RHS); in LowerUDIVREM64()
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 5674 unsigned Zero64 = MRI.createVirtualRegister(&SystemZ::GR64BitRegClass); in emitExt128() local
5676 BuildMI(*MBB, MI, DL, TII->get(SystemZ::LLILL), Zero64) in emitExt128()
5679 .addReg(In128).addReg(Zero64).addImm(SystemZ::subreg_h64); in emitExt128()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 6688 unsigned Zero64 = MRI.createVirtualRegister(&SystemZ::GR64BitRegClass); in emitExt128() local
6690 BuildMI(*MBB, MI, DL, TII->get(SystemZ::LLILL), Zero64) in emitExt128()
6693 .addReg(In128).addReg(Zero64).addImm(SystemZ::subreg_h64); in emitExt128()
|