/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUMachineCFGStructurizer.cpp | 394 void addLiveOut(unsigned VReg); 705 addLiveOut(Reg); in storeLiveOutReg() 712 addLiveOut(Reg); in storeLiveOutReg() 724 addLiveOut(Reg); in storeLiveOutReg() 745 addLiveOut(Reg); in storeLiveOutRegRegion() 784 addLiveOut(PHIReg); in storeLiveOuts() 853 addLiveOut(PHIReg); in storeLiveOuts() 896 void LinearizedRegion::addLiveOut(unsigned VReg) { LiveOuts.insert(VReg); } in addLiveOut() function in LinearizedRegion 906 addLiveOut(NewReg); in replaceLiveOut() 1629 LRegion->addLiveOut(CombinedSourceReg); in replaceLiveOutRegs() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsDelaySlotFiller.cpp | 125 void addLiveOut(const MachineBasicBlock &MBB, 405 void RegDefsUses::addLiveOut(const MachineBasicBlock &MBB, in addLiveOut() function in RegDefsUses 903 RegDU.addLiveOut(Pred, Succ); in examinePred()
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/external/llvm/lib/Target/Mips/ |
D | MipsDelaySlotFiller.cpp | 105 void addLiveOut(const MachineBasicBlock &MBB, 377 void RegDefsUses::addLiveOut(const MachineBasicBlock &MBB, in addLiveOut() function in RegDefsUses 859 RegDU.addLiveOut(Pred, Succ); in examinePred()
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | MachineRegisterInfo.h | 304 void addLiveOut(unsigned Reg) { LiveOuts.push_back(Reg); } in addLiveOut() function
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/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
D | AlphaISelLowering.cpp | 504 DAG.getMachineFunction().getRegInfo().addLiveOut(ArgReg); in LowerReturn() 523 DAG.getMachineFunction().getRegInfo().addLiveOut(ArgReg1); in LowerReturn() 529 DAG.getMachineFunction().getRegInfo().addLiveOut(ArgReg2); in LowerReturn()
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/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
D | BlackfinISelLowering.cpp | 244 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); in LowerReturn()
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/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 104 MF.getRegInfo().addLiveOut(RVLocs[i].getLocReg()); in LowerReturn() 132 MF.getRegInfo().addLiveOut(SP::I0); in LowerReturn()
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 575 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); in LowerReturn()
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
D | MBlazeISelLowering.cpp | 1028 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); in LowerReturn()
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 410 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); in LowerReturn()
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/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
D | XCoreISelLowering.cpp | 1226 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); in LowerReturn()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMFastISel.cpp | 1772 MRI.addLiveOut(VA.getLocReg()); in SelectRet()
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D | ARMISelLowering.cpp | 1787 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); in LowerReturn()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86FastISel.cpp | 788 MRI.addLiveOut(VA.getLocReg()); in X86SelectRet()
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D | X86ISelLowering.cpp | 1411 MRI.addLiveOut(RVLocs[i].getLocReg()); in LowerReturn() 1492 MRI.addLiveOut(X86::RAX); in LowerReturn() 9484 MF.getRegInfo().addLiveOut(StoreAddrReg); in LowerEH_RETURN()
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
D | MipsISelLowering.cpp | 2440 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); in LowerReturn()
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 2766 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); in FinishCall() 3446 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); in LowerReturn()
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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
D | SPUISelLowering.cpp | 1470 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); in LowerReturn()
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