| /external/libxaac/decoder/ |
| D | ixheaacd_ps_bitdec.c | 234 env_count = add_d(env_count, MAX_NUM_COLUMNS); in ixheaacd_decode_ps_data()
243 add_d(ptr_ps_dec->num_env, 1); in ixheaacd_decode_ps_data()
262 threshold = add_d(ptr_ps_dec->border_position[e - 1], 1); in ixheaacd_decode_ps_data()
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| D | ixheaacd_basic_op.h | 23 #define add_d(a, b) ((a) + (b)) macro
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| D | ixheaacd_pns_js_thumb.c | 149 scale_exp = add_d(sub_d(31, (ptr_aac_dec_channel_info[channel] in ixheaacd_pns_process()
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| D | ixheaacd_freq_sca.c | 452 num_mf_bands = add_d(num_bands0, num_bands1); in ixheaacd_calc_master_frq_bnd_tbl()
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| D | ixheaacd_env_extr.c | 544 if (end_pos > add_d(SBR_TIME_SLOTS, SBR_OV_SLOTS)) return 0; in ixheaacd_validate_frame_info()
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| /external/swiftshader/third_party/LLVM/test/CodeGen/Blackfin/ |
| D | inline-asm.ll | 12 define i32 @add_d(i32 %A, i32 %B) {
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | arith-fp.ll | 7 define double @add_d(double %a, double %b) {
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| /external/llvm/test/CodeGen/Thumb2/ |
| D | float-ops.ll | 15 define double @add_d(double %a, double %b) {
17 ; CHECK-LABEL: add_d:
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/ |
| D | float-ops.ll | 15 define double @add_d(double %a, double %b) {
17 ; CHECK-LABEL: add_d:
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| /external/llvm/test/Transforms/LoopVectorize/AArch64/ |
| D | loop-vectorization-factors.ll | 90 ; CHECK-LABEL: @add_d(
94 define void @add_d(i16* noalias nocapture readonly %p, i32* noalias nocapture %q, i32 %len) #0 {
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/AArch64/ |
| D | loop-vectorization-factors.ll | 118 ; CHECK-LABEL: @add_d(
122 define void @add_d(i16* noalias nocapture readonly %p, i32* noalias nocapture %q, i32 %len) #0 {
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerMIPS32.h | 122 void add_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
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| D | IceInstMIPS32.cpp | 743 Asm->add_d(getDest(), getSrc(0), getSrc(1)); in emitIAS()
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| D | IceAssemblerMIPS32.cpp | 383 void AssemblerMIPS32::add_d(const Operand *OpFd, const Operand *OpFs, in add_d() function in Ice::MIPS32::AssemblerMIPS32
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| /external/v8/src/wasm/baseline/mips64/ |
| D | liftoff-assembler-mips64.h | 719 FP_BINOP(f64_add, add_d) in FP_BINOP()
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| /external/v8/src/mips/ |
| D | macro-assembler-mips.cc | 1814 add_d(fd, fd, scratch); in Cvt_d_uw()
2109 add_d(fd, fr, scratch); in Madd_d()
5190 add_d(dst, src1, src2); in Float64MaxOutOfLine()
5240 add_d(dst, src1, src2); in Float64MinOutOfLine()
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| D | assembler-mips.h | 981 void add_d(FPURegister fd, FPURegister fs, FPURegister ft);
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| D | assembler-mips.cc | 2750 void Assembler::add_d(FPURegister fd, FPURegister fs, FPURegister ft) { in add_d() function in v8::internal::Assembler
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| /external/v8/src/mips64/ |
| D | macro-assembler-mips64.cc | 2169 add_d(fd, fd, fd); // In delay slot. in Cvt_d_ul()
2632 add_d(fd, fr, scratch); in Madd_d()
5593 add_d(dst, src1, src2); in Float64MaxOutOfLine()
5642 add_d(dst, src1, src2); in Float64MinOutOfLine()
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| D | assembler-mips64.h | 1052 void add_d(FPURegister fd, FPURegister fs, FPURegister ft);
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| D | assembler-mips64.cc | 3142 void Assembler::add_d(FPURegister fd, FPURegister fs, FPURegister ft) { in add_d() function in v8::internal::Assembler
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| /external/v8/src/wasm/baseline/mips/ |
| D | liftoff-assembler-mips.h | 824 FP_BINOP(f64_add, add_d) in FP_BINOP()
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| /external/v8/src/compiler/mips/ |
| D | code-generator-mips.cc | 1204 __ add_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0), in AssembleArchInstruction() local
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| /external/v8/src/compiler/mips64/ |
| D | code-generator-mips64.cc | 1331 __ add_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0), in AssembleArchInstruction() local
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