| /external/libxaac/decoder/armv7/ |
| D | ixheaacd_fft_15_ld.s | 316 ADD r8, r2, r4 @ add_r = add32(buf1[2], buf1[4])
322 @ASR r8, r8, #1 @ p1 = add_r >> 1@
362 ADD r8, r2, r4 @ add_r = add32(buf1[2], buf1[4])
368 @ASR r8, r8, #1 @ p1 = add_r >> 1@
406 ADD r8, r2, r4 @ add_r = add32(buf1[2], buf1[4])
413 @ASR r8, r8, #1 @ p1 = add_r >> 1@
450 ADD r8, r2, r4 @ add_r = add32(buf1[2], buf1[4])
456 @ASR r8, r8, #1 @ p1 = add_r >> 1@
492 ADD r8, r2, r4 @ add_r = add32(buf1[2], buf1[4])
498 @ASR r8, r8, #1 @ p1 = add_r >> 1@
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| /external/swiftshader/third_party/LLVM/test/CodeGen/Generic/ |
| D | print-arith-fp.ll | 27 %add_r = fadd double %a, %b ; <double> [#uses=1]
37 call i32 (i8*, ...)* @printf( i8* %add_s, double %add_r ) ; <i32>:3 [#uses=0]
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| D | print-arith-int.ll | 32 %add_r = add i32 %a, %b ; <i32> [#uses=1]
42 call i32 (i8*, ...)* @printf( i8* %add_s, i32 %add_r ) ; <i32>:3 [#uses=0]
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| /external/llvm/test/CodeGen/Generic/ |
| D | print-arith-fp.ll | 27 %add_r = fadd double %a, %b ; <double> [#uses=1]
37 call i32 (i8*, ...) @printf( i8* %add_s, double %add_r ) ; <i32>:3 [#uses=0]
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| D | print-arith-int.ll | 32 %add_r = add i32 %a, %b ; <i32> [#uses=1]
42 call i32 (i8*, ...) @printf( i8* %add_s, i32 %add_r ) ; <i32>:3 [#uses=0]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Generic/ |
| D | print-arith-fp.ll | 27 %add_r = fadd double %a, %b ; <double> [#uses=1]
37 call i32 (i8*, ...) @printf( i8* %add_s, double %add_r ) ; <i32>:3 [#uses=0]
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| D | print-arith-int.ll | 32 %add_r = add i32 %a, %b ; <i32> [#uses=1]
42 call i32 (i8*, ...) @printf( i8* %add_s, i32 %add_r ) ; <i32>:3 [#uses=0]
|
| /external/libvpx/libvpx/vpx_dsp/mips/ |
| D | deblock_msa.c | 545 v8u16 add_r, add_l; in vpx_mbpost_proc_across_ip_msa() local
575 HADD_UB2_UH(src_r, src_l, add_r, add_l); in vpx_mbpost_proc_across_ip_msa()
578 ILVR_H2_SW(zero, add_r, zero, add_l, sum0_w, sum2_w); in vpx_mbpost_proc_across_ip_msa()
579 ILVL_H2_SW(zero, add_r, zero, add_l, sum1_w, sum3_w); in vpx_mbpost_proc_across_ip_msa()
641 v8u16 add_r, add_l; in vpx_mbpost_proc_down_msa() local
702 HADD_UB2_UH(dst_r_b, dst_l_b, add_r, add_l); in vpx_mbpost_proc_down_msa()
704 ILVRL_H2_SW(zero, add_r, add0, add1); in vpx_mbpost_proc_down_msa()
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| /external/swiftshader/third_party/LLVM/test/CodeGen/Blackfin/ |
| D | inline-asm.ll | 5 define i32 @add_r(i32 %A, i32 %B) {
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARC/ |
| D | alu.ll | 3 ; CHECK-LABEL: add_r
5 define i32 @add_r(i32 %a, i32 %b) nounwind {
|
| /external/libxaac/decoder/ |
| D | ixheaacd_esbr_fft.c | 1057 FLOAT32 add_r, sub_r; in ixheaacd_aac_ld_dec_fft_3_float() local
1069 add_r = inp[2] + inp[4]; in ixheaacd_aac_ld_dec_fft_3_float()
1075 p1 = add_r / 2.0f; in ixheaacd_aac_ld_dec_fft_3_float()
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| D | ixheaacd_fft.c | 1623 WORD32 add_r, sub_r; in ixheaacd_complex_3point_fft() local
1635 add_r = ixheaacd_add32_sat(inp[2], inp[4]); in ixheaacd_complex_3point_fft()
1641 p1 = add_r >> 1; in ixheaacd_complex_3point_fft()
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| D | ixheaacd_aac_imdct.c | 2210 WORD32 add_r, sub_r; in ixheaacd_fft_15_ld_dec() local
2463 add_r = ixheaacd_add32_sat(xr_1, xr_2); in ixheaacd_fft_15_ld_dec()
2469 p1 = add_r >> 1; in ixheaacd_fft_15_ld_dec()
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| /external/scapy/test/ |
| D | regression.uts | 1366 def add_r(self):
|