/external/llvm/test/CodeGen/SystemZ/ |
D | args-06.ll | 16 %addc = add i8 %addb, %c 17 %addd = add i8 %addc, %d 34 %addc = add i16 %addb, %c 35 %addd = add i16 %addc, %d 52 %addc = add i32 %addb, %c 53 %addd = add i32 %addc, %d 70 %addc = add i64 %addb, %c 71 %addd = add i64 %addc, %d
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/ |
D | args-06.ll | 16 %addc = add i8 %addb, %c 17 %addd = add i8 %addc, %d 34 %addc = add i16 %addb, %c 35 %addd = add i16 %addc, %d 52 %addc = add i32 %addb, %c 53 %addd = add i32 %addc, %d 70 %addc = add i64 %addb, %c 71 %addd = add i64 %addc, %d
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/external/antlr/runtime/C/src/ |
D | antlr3debughandlers.c | 406 buffer->addc(buffer, character); in serializeText() 439 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeToken() 441 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeToken() 443 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeToken() 445 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeToken() 494 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeNode() 499 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeNode() 509 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeNode() 515 delboy->tokenString->addc(delboy->tokenString, ' '); in serializeNode() 523 delboy->tokenString->addc(delboy->tokenString, '\t'); in serializeNode() [all …]
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D | antlr3basetreeadaptor.c | 223 dotSpec->addc(dotSpec, text->charAt(text, j)); in defineDotNodes() 310 dotSpec->addc(dotSpec, text->charAt(text, j)); in defineDotEdges() 339 dotSpec->addc(dotSpec, text->charAt(text, j)); in defineDotEdges() 416 dotSpec->addc(dotSpec, text->charAt(text, j)); in makeDot()
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/external/llvm/test/MC/Lanai/ |
D | v11.s | 19 addc %r17, %r18, %r21 label 21 addc.f %r17, %r18, %r21 23 addc %r17, 0, %r21 label 25 addc %r17, 0x00001234, %r21 label 27 addc %r17, 0x12340000, %r21 label 29 addc.f %r17, 0, %r21 31 addc.f %r17, 0x00001234, %r21 33 addc.f %r17, 0x12340000, %r21 335 ld [%r17 addc %r18], %r21 353 ld [*%r17 addc %r18], %r21 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Lanai/ |
D | v11.s | 19 addc %r17, %r18, %r21 label 21 addc.f %r17, %r18, %r21 23 addc %r17, 0, %r21 label 25 addc %r17, 0x00001234, %r21 label 27 addc %r17, 0x12340000, %r21 label 29 addc.f %r17, 0, %r21 31 addc.f %r17, 0x00001234, %r21 33 addc.f %r17, 0x12340000, %r21 335 ld [%r17 addc %r18], %r21 353 ld [*%r17 addc %r18], %r21 [all …]
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/external/llvm/test/MC/Disassembler/Lanai/ |
D | v11.txt | 20 # CHECK: addc %r17, %r18, %r21 22 # CHECK: addc.f %r17, %r18, %r21 24 # CHECK: addc %r17, 0x0, %r21 26 # CHECK: addc %r17, 0x1234, %r21 28 # CHECK: addc %r17, 0x12340000, %r21 30 # CHECK: addc.f %r17, 0x0, %r21 32 # CHECK: addc.f %r17, 0x1234, %r21 34 # CHECK: addc.f %r17, 0x12340000, %r21 282 # CHECK: ld [%r17 addc %r18], %r21 300 # CHECK: ld [*%r17 addc %r18], %r21 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Lanai/ |
D | v11.txt | 20 # CHECK: addc %r17, %r18, %r21 22 # CHECK: addc.f %r17, %r18, %r21 24 # CHECK: addc %r17, 0x0, %r21 26 # CHECK: addc %r17, 0x1234, %r21 28 # CHECK: addc %r17, 0x12340000, %r21 30 # CHECK: addc.f %r17, 0x0, %r21 32 # CHECK: addc.f %r17, 0x1234, %r21 34 # CHECK: addc.f %r17, 0x12340000, %r21 282 # CHECK: ld [%r17 addc %r18], %r21 300 # CHECK: ld [*%r17 addc %r18], %r21 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
D | addsubcarry.ll | 5 ; CHECK-LABEL: addc: 9 define void @addc(i128 %a0, i128 %a1) #0 {
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/external/u-boot/arch/sh/lib/ |
D | udiv_qrnnd.S | 41 addc r5,r0 54 addc r5,r0
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/external/capstone/suite/MC/PowerPC/ |
D | ppc64-encoding.s.cs | 77 0x7c,0x43,0x20,0x14 = addc 2, 3, 4 78 0x7c,0x43,0x20,0x15 = addc. 2, 3, 4
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/external/llvm/test/CodeGen/PowerPC/ |
D | ppc64-i128-abi.ll | 123 ; Add the lower 64-bits using addc on registers 3 and 5 131 ; Add the lower 64-bits using addc on registers 4 and 6 138 ; CHECK-LE: addc 3, 3, 5 143 ; CHECK-BE: addc 4, 4, 6 148 ; CHECK-LE-NOVSX: addc 3, 3, 5 153 ; CHECK-BE-NOVSX: addc 4, 4, 6
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D | big-endian-actual-args.ll | 2 ; RUN: grep "addc 4, 4, 6"
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D | addc.ll | 9 ; CHECK: addc r4, r6, r4
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
D | MSP430InstrInfo.td | 433 "addc.b\t{$src2, $dst}", 438 "addc.w\t{$src2, $dst}", 445 "addc.b\t{$src2, $dst}", 450 "addc.w\t{$src2, $dst}", 456 "addc.b\t{$src2, $dst}", 461 "addc.w\t{$src2, $dst}", 468 "addc.b\t{$src, $dst}", 473 "addc.w\t{$src, $dst}", 479 "addc.b\t{$src, $dst}", 484 "addc.w\t{$src, $dst}", [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.td | 441 "addc.b\t{$src2, $dst}", 446 "addc.w\t{$src2, $dst}", 453 "addc.b\t{$src2, $dst}", 458 "addc.w\t{$src2, $dst}", 464 "addc.b\t{$src2, $dst}", 469 "addc.w\t{$src2, $dst}", 476 "addc.b\t{$src, $dst}", 481 "addc.w\t{$src, $dst}", 487 "addc.b\t{$src, $dst}", 492 "addc.w\t{$src, $dst}", [all …]
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/external/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.td | 433 "addc.b\t{$src2, $dst}", 438 "addc.w\t{$src2, $dst}", 445 "addc.b\t{$src2, $dst}", 450 "addc.w\t{$src2, $dst}", 456 "addc.b\t{$src2, $dst}", 461 "addc.w\t{$src2, $dst}", 468 "addc.b\t{$src, $dst}", 473 "addc.w\t{$src, $dst}", 479 "addc.b\t{$src, $dst}", 484 "addc.w\t{$src, $dst}", [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | shrink-carry.mir | 51 # GCN-LABEL: name: addc{{$}} 55 name: addc
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/external/swiftshader/third_party/LLVM/test/MC/MBlaze/ |
D | mblaze_typea.s | 14 # CHECK: addc 17 addc r1, r2, r3
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | ppc64-i128-abi.ll | 159 ; Add the lower 64-bits using addc on registers 3 and 5 167 ; Add the lower 64-bits using addc on registers 4 and 6 174 ; CHECK-LE: addc 3, 3, 5 179 ; CHECK-BE: addc 4, 4, 6 184 ; CHECK-LE-NOVSX: addc 3, 3, 5 189 ; CHECK-BE-NOVSX: addc 4, 4, 6
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D | addegluecrash.ll | 15 ; CHECK-NEXT: addc 6, 9, 8 20 ; CHECK-NEXT: addc 6, 6, 8
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D | big-endian-actual-args.ll | 2 ; RUN: grep "addc 4, 4, 6"
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/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/ |
D | big-endian-actual-args.ll | 2 ; RUN: grep {addc 4, 4, 6}
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/external/llvm/test/CodeGen/AMDGPU/ |
D | uaddo.ll | 10 ; SI: addc 11 ; SI: addc
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/external/u-boot/arch/powerpc/lib/ |
D | ticks.S | 42 addc r14, r4, r14 /* Compute end time lower */
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