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Searched refs:addhn (Results 1 – 25 of 49) sorted by relevance

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/external/llvm/test/CodeGen/AArch64/
Darm64-vecFold.ll53 …%vaddhn2.i = tail call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %a0, <4 x i32> %a1) noun…
54 …%vaddhn2.i10 = tail call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %b0, <4 x i32> %b1) no…
55 ; CHECK: addhn.4h v0, v0, v1
67 …%vaddhn2.i = tail call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %a0, <4 x i32> %a1) noun…
70 ; CHECK: addhn.4h v0, v0, v1
126 …%vaddhn2.i = tail call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %b0, <4 x i32> %b1) noun…
141 declare <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
Darm64-vadd.ll5 ;CHECK: addhn.8b
8 %tmp3 = call <8 x i8> @llvm.aarch64.neon.addhn.v8i8(<8 x i16> %tmp1, <8 x i16> %tmp2)
14 ;CHECK: addhn.4h
17 %tmp3 = call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %tmp1, <4 x i32> %tmp2)
23 ;CHECK: addhn.2s
26 %tmp3 = call <2 x i32> @llvm.aarch64.neon.addhn.v2i32(<2 x i64> %tmp1, <2 x i64> %tmp2)
32 ;CHECK: addhn.8b
34 %vaddhn2.i = tail call <8 x i8> @llvm.aarch64.neon.addhn.v8i8(<8 x i16> %a, <8 x i16> %b) nounwind
35 …%vaddhn_high2.i = tail call <8 x i8> @llvm.aarch64.neon.addhn.v8i8(<8 x i16> %a, <8 x i16> %b) nou…
42 ;CHECK: addhn.4h
[all …]
Darm64-neon-3vdiff.ll547 ; CHECK: addhn {{v[0-9]+}}.8b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
557 ; CHECK: addhn {{v[0-9]+}}.4h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
567 ; CHECK: addhn {{v[0-9]+}}.2s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
577 ; CHECK: addhn {{v[0-9]+}}.8b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
587 ; CHECK: addhn {{v[0-9]+}}.4h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
597 ; CHECK: addhn {{v[0-9]+}}.2s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-vecFold.ll53 …%vaddhn2.i = tail call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %a0, <4 x i32> %a1) noun…
54 …%vaddhn2.i10 = tail call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %b0, <4 x i32> %b1) no…
55 ; CHECK: addhn.4h v0, v0, v1
67 …%vaddhn2.i = tail call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %a0, <4 x i32> %a1) noun…
70 ; CHECK: addhn.4h v0, v0, v1
126 …%vaddhn2.i = tail call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %b0, <4 x i32> %b1) noun…
141 declare <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
Darm64-vadd.ll5 ;CHECK: addhn.8b
8 %tmp3 = call <8 x i8> @llvm.aarch64.neon.addhn.v8i8(<8 x i16> %tmp1, <8 x i16> %tmp2)
14 ;CHECK: addhn.4h
17 %tmp3 = call <4 x i16> @llvm.aarch64.neon.addhn.v4i16(<4 x i32> %tmp1, <4 x i32> %tmp2)
23 ;CHECK: addhn.2s
26 %tmp3 = call <2 x i32> @llvm.aarch64.neon.addhn.v2i32(<2 x i64> %tmp1, <2 x i64> %tmp2)
32 ;CHECK: addhn.8b
34 %vaddhn2.i = tail call <8 x i8> @llvm.aarch64.neon.addhn.v8i8(<8 x i16> %a, <8 x i16> %b) nounwind
35 …%vaddhn_high2.i = tail call <8 x i8> @llvm.aarch64.neon.addhn.v8i8(<8 x i16> %a, <8 x i16> %b) nou…
42 ;CHECK: addhn.4h
[all …]
Darm64-neon-3vdiff.ll547 ; CHECK: addhn {{v[0-9]+}}.8b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
557 ; CHECK: addhn {{v[0-9]+}}.4h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
567 ; CHECK: addhn {{v[0-9]+}}.2s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
577 ; CHECK: addhn {{v[0-9]+}}.8b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
587 ; CHECK: addhn {{v[0-9]+}}.4h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
597 ; CHECK: addhn {{v[0-9]+}}.2s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
/external/llvm/test/MC/AArch64/
Dneon-3vdiff.s369 addhn v0.8b, v1.8h, v2.8h
370 addhn v0.4h, v1.4s, v2.4s
371 addhn v0.2s, v1.2d, v2.2d
Darm64-advsimd.s39 addhn.8b v0, v0, v0
41 addhn.4h v0, v0, v0
43 addhn.2s v0, v0, v0
46 ; CHECK: addhn.8b v0, v0, v0 ; encoding: [0x00,0x40,0x20,0x0e]
48 ; CHECK: addhn.4h v0, v0, v0 ; encoding: [0x00,0x40,0x60,0x0e]
50 ; CHECK: addhn.2s v0, v0, v0 ; encoding: [0x00,0x40,0xa0,0x0e]
Dneon-diagnostics.s2763 addhn v0.8b, v1.8h, v2.8d
2764 addhn v0.4h, v1.4s, v2.4h
2765 addhn v0.2s, v1.2d, v2.2s
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-3vdiff.s369 addhn v0.8b, v1.8h, v2.8h
370 addhn v0.4h, v1.4s, v2.4s
371 addhn v0.2s, v1.2d, v2.2d
Darm64-advsimd.s39 addhn.8b v0, v0, v0
41 addhn.4h v0, v0, v0
43 addhn.2s v0, v0, v0
46 ; CHECK: addhn.8b v0, v0, v0 ; encoding: [0x00,0x40,0x20,0x0e]
48 ; CHECK: addhn.4h v0, v0, v0 ; encoding: [0x00,0x40,0x60,0x0e]
50 ; CHECK: addhn.2s v0, v0, v0 ; encoding: [0x00,0x40,0xa0,0x0e]
Dneon-diagnostics.s2706 addhn v0.8b, v1.8h, v2.8d
2707 addhn v0.4h, v1.4s, v2.4h
2708 addhn v0.2s, v1.2d, v2.2s
/external/capstone/suite/MC/AArch64/
Dneon-3vdiff.s.cs126 0x20,0x40,0x22,0x0e = addhn v0.8b, v1.8h, v2.8h
127 0x20,0x40,0x62,0x0e = addhn v0.4h, v1.4s, v2.4s
128 0x20,0x40,0xa2,0x0e = addhn v0.2s, v1.2d, v2.2d
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt44 # CHECK: addhn.8b v0, v0, v0
46 # CHECK: addhn.4h v0, v0, v0
48 # CHECK: addhn.2s v0, v0, v0
Dneon-instructions.txt1430 # CHECK: addhn v0.8b, v1.8h, v2.8h
1431 # CHECK: addhn v0.4h, v1.4s, v2.4s
1432 # CHECK: addhn v0.2s, v1.2d, v2.2d
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt44 # CHECK: addhn.8b v0, v0, v0
46 # CHECK: addhn.4h v0, v0, v0
48 # CHECK: addhn.2s v0, v0, v0
Dneon-instructions.txt1430 # CHECK: addhn v0.8b, v1.8h, v2.8h
1431 # CHECK: addhn v0.4h, v1.4s, v2.4s
1432 # CHECK: addhn v0.2s, v1.2d, v2.2d
/external/v8/src/arm64/
Dmacro-assembler-arm64.h385 V(addhn, Addhn) \
Dsimulator-arm64.h1833 V(addhn) \
Dassembler-arm64.h1824 void addhn(const VRegister& vd, const VRegister& vn, const VRegister& vm);
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour544 0x~~~~~~~~~~~~~~~~ 0eaf41ca addhn v10.2s, v14.2d, v15.2d
545 0x~~~~~~~~~~~~~~~~ 0e7a43ca addhn v10.4h, v30.4s, v26.4s
546 0x~~~~~~~~~~~~~~~~ 0e36419f addhn v31.8b, v12.8h, v22.8h
Dlog-disasm544 0x~~~~~~~~~~~~~~~~ 0eaf41ca addhn v10.2s, v14.2d, v15.2d
545 0x~~~~~~~~~~~~~~~~ 0e7a43ca addhn v10.4h, v30.4s, v26.4s
546 0x~~~~~~~~~~~~~~~~ 0e36419f addhn v31.8b, v12.8h, v22.8h
Dlog-cpufeatures-custom543 0x~~~~~~~~~~~~~~~~ 0eaf41ca addhn v10.2s, v14.2d, v15.2d ### {NEON} ###
544 0x~~~~~~~~~~~~~~~~ 0e7a43ca addhn v10.4h, v30.4s, v26.4s ### {NEON} ###
545 0x~~~~~~~~~~~~~~~~ 0e36419f addhn v31.8b, v12.8h, v22.8h ### {NEON} ###
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc629 __ addhn(v10.V2S(), v14.V2D(), v15.V2D()); in GenerateTestSequenceNEON() local
630 __ addhn(v10.V4H(), v30.V4S(), v26.V4S()); in GenerateTestSequenceNEON() local
631 __ addhn(v31.V8B(), v12.V8H(), v22.V8H()); in GenerateTestSequenceNEON() local
/external/vixl/src/aarch64/
Dsimulator-aarch64.h2747 V(addhn) \

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