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Searched refs:addius5 (Results 1 – 25 of 25) sorted by relevance

/external/llvm/test/MC/Mips/
Dmicromips-16-bit-instructions.s37 # CHECK-EL: addius5 $7, -2 # encoding: [0xfc,0x4c]
92 # CHECK-EB: addius5 $7, -2 # encoding: [0x4c,0xfc]
145 addius5 $7, -2
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dmicromips-16-bit-instructions.s37 # CHECK-EL: addius5 $7, -2 # encoding: [0xfc,0x4c]
92 # CHECK-EB: addius5 $7, -2 # encoding: [0x4c,0xfc]
145 addius5 $7, -2
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/
Dadd.ll399 ; MMR6: addius5 $[[T0:[0-9]+]], 3
417 ; MMR6: addius5 $[[T0:[0-9]+]], 3
431 ; MMR6: addius5 $[[T0:[0-9]+]], 3
448 ; MM32: addius5 $[[T1]], 3
493 ; MMR3: addius5 $[[T1]], 3
503 ; MMR6: addius5 $[[T1]], 3
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dmicromips-addiu.ll30 ; CHECK: addius5 ${{[0-9]+}}, -7
/external/llvm/test/CodeGen/Mips/
Dmicromips-addiu.ll30 ; CHECK: addius5 ${{[0-9]+}}, -7
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dadd.ll334 ; MMR6: addius5 $[[T0:[0-9]+]], 3
352 ; MMR6: addius5 $[[T0:[0-9]+]], 3
366 ; MMR6: addius5 $[[T0:[0-9]+]], 3
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips/
Dinvalid.s7 addius5 $2, -9 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate
8 addius5 $2, 8 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate
Dvalid.s74 addius5 $7, -2 # CHECK: addius5 $7, -2 # encoding: [0x4c,0xfc] label
/external/llvm/test/MC/Mips/micromips/
Dinvalid.s7 addius5 $2, -9 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate
8 addius5 $2, 8 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate
/external/llvm/test/MC/Mips/micromips32r6/
Dinvalid.s9 addius5 $2, -9 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate
10 addius5 $2, 8 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate
Dvalid.s11 addius5 $7, -2 # CHECK: addius5 $7, -2 # encoding: [0x4c,0xfc]
/external/llvm/test/MC/Mips/micromips64r6/
Dvalid.s7 addius5 $7, -2 # CHECK: addius5 $7, -2 # encoding: [0x4c,0xfc]
Dinvalid.s9 addius5 $2, -9 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate
10 addius5 $2, 8 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt39 0xfc 0x4c # CHECK: addius5 $7, -2
Dvalid.txt39 0x4c 0xfc # CHECK: addius5 $7, -2
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips32r6/
Dvalid.s14 addius5 $7, -2 # CHECK: addius5 $7, -2 # encoding: [0x4c,0xfc]
Dinvalid.s9 addius5 $2, -9 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate
10 addius5 $2, 8 # CHECK: :[[@LINE]]:15: error: expected 4-bit signed immediate
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt40 0xfc 0x4c # CHECK: addius5 $7, -2
Dvalid.txt40 0x4c 0xfc # CHECK: addius5 $7, -2
/external/llvm/test/MC/Disassembler/Mips/micromips64r6/
Dvalid.txt6 0x4c 0xfc # CHECK: addius5 $7, -2
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt6 0x4c 0xfc # CHECK: addius5 $7, -2
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt6 0x4c 0xfc # CHECK: addius5 $7, -2
/external/llvm/lib/Target/Mips/
DMicroMipsInstrInfo.td634 def ADDIUS5_MM : AddImmUS5<"addius5", GPR32Opnd>, ADDIUS5_FM_MM16;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMicroMipsInstrInfo.td676 def ADDIUS5_MM : AddImmUS5<"addius5", GPR32Opnd>, ADDIUS5_FM_MM16,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenAsmMatcher.inc4835 "diu\007addiupc\taddiur1sp\007addiur2\007addius5\007addiusp\007addq.ph\t"
5103 …{ 130 /* addius5 */, Mips::ADDIUS5_MM, Convert__GPR32AsmReg1_0__Tie0_1_1__ConstantSImm4_01_1, Feat…
7944 { Feature_InMicroMips, 130 /* addius5 */, MCK_GPR32AsmReg, 1 /* 0 */ },