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Searched refs:addressSize (Results 1 – 13 of 13) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.c492 insn->addressSize = (hasAdSize ? 4 : 2); in readPrefixes()
497 insn->addressSize = (hasAdSize ? 2 : 4); in readPrefixes()
503 insn->addressSize = (hasAdSize ? 4 : 8); in readPrefixes()
508 insn->addressSize = (hasAdSize ? 4 : 8); in readPrefixes()
513 insn->addressSize = (hasAdSize ? 4 : 8); in readPrefixes()
917 switch (insn->addressSize) { in readSIB()
975 insn->sibBase = (insn->addressSize == 4 ? in readSIB()
980 insn->sibBase = (insn->addressSize == 4 ? in readSIB()
1088 switch (insn->addressSize) { in readModRM()
1125 insn->eaBaseBase = (insn->addressSize == 4 ? EA_BASE_EAX : EA_BASE_RAX); in readModRM()
[all …]
DX86DisassemblerDecoder.h460 uint8_t addressSize; member
/external/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.cpp639 insn->addressSize = (hasAdSize ? 4 : 2); in readPrefixes()
644 insn->addressSize = (hasAdSize ? 2 : 4); in readPrefixes()
650 insn->addressSize = (hasAdSize ? 4 : 8); in readPrefixes()
655 insn->addressSize = (hasAdSize ? 4 : 8); in readPrefixes()
660 insn->addressSize = (hasAdSize ? 4 : 8); in readPrefixes()
1188 switch (insn->addressSize) { in readSIB()
1359 switch (insn->addressSize) { in readModRM()
1397 insn->eaBaseBase = (insn->addressSize == 4 ? EA_BASE_EAX : EA_BASE_RAX); in readModRM()
1407 insn->eaBase = (insn->addressSize == 4 ? in readModRM()
1798 if (readImmediate(insn, insn->addressSize)) in readOperands()
DX86DisassemblerDecoder.h569 uint8_t addressSize; member
DX86Disassembler.cpp777 (insn.addressSize == 8 ? SIB_INDEX_RAX:SIB_INDEX_EAX); in translateRMMemory()
/external/capstone/arch/X86/
DX86DisassemblerDecoder.c872 insn->addressSize = (hasAdSize ? 4 : 2); in readPrefixes()
878 insn->addressSize = (hasAdSize ? 2 : 4); in readPrefixes()
885 insn->addressSize = (hasAdSize ? 4 : 8); in readPrefixes()
891 insn->addressSize = (hasAdSize ? 4 : 8); in readPrefixes()
897 insn->addressSize = (hasAdSize ? 4 : 8); in readPrefixes()
1384 switch (insn->addressSize) { in readSIB()
1573 switch (insn->addressSize) { in readModRM()
1612 insn->eaBaseBase = (insn->addressSize == 4 ? EA_BASE_EAX : EA_BASE_RAX); in readModRM()
1621 insn->eaBase = (insn->addressSize == 4 ? in readModRM()
2075 if (readImmediate(insn, insn->addressSize)) in readOperands()
DX86Disassembler.c440 (insn->addressSize == 8 ? SIB_INDEX_RAX:SIB_INDEX_EAX); in translateRMMemory()
755 pub->detail->x86.addr_size = inter->addressSize; in update_pub_insn()
DX86DisassemblerDecoder.h643 uint8_t addressSize; member
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.cpp610 insn->addressSize = (insn->hasAdSize ? 4 : 2); in readPrefixes()
615 insn->addressSize = (insn->hasAdSize ? 2 : 4); in readPrefixes()
621 insn->addressSize = (insn->hasAdSize ? 4 : 8); in readPrefixes()
626 insn->addressSize = (insn->hasAdSize ? 4 : 8); in readPrefixes()
1199 switch (insn->addressSize) { in readSIB()
1356 switch (insn->addressSize) { in readModRM()
1395 EABase eaBaseBase = (insn->addressSize == 4 ? EA_BASE_EAX : EA_BASE_RAX); in readModRM()
1405 insn->eaBase = (insn->addressSize == 4 ? in readModRM()
1850 if (readImmediate(insn, insn->addressSize)) in readOperands()
DX86Disassembler.cpp792 indexReg = MCOperand::createReg(insn.addressSize == 4 ? X86::EIZ : in translateRMMemory()
813 baseReg = MCOperand::createReg(insn.addressSize == 4 ? X86::EIP : in translateRMMemory()
DX86DisassemblerDecoder.h573 uint8_t addressSize; member
/external/llvm/utils/TableGen/
DX86DisassemblerTables.cpp908 unsigned addressSize) { in setTableFields() argument
912 if ((is32bit || addressSize == 16) && in setTableFields()
916 bool adSize64 = addressSize == 64; in setTableFields()
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DX86DisassemblerTables.cpp1119 unsigned addressSize) { in setTableFields() argument
1123 if ((is32bit || addressSize == 16) && in setTableFields()
1127 bool adSize64 = addressSize == 64; in setTableFields()