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Searched refs:allocatableRegs_ (Results 1 – 3 of 3) sorted by relevance

/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DLiveIntervalAnalysis.h64 BitVector allocatableRegs_; variable
105 return allocatableRegs_.test(reg); in isAllocatable()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DRegAllocLinearScan.cpp141 BitVector allocatableRegs_; member
512 allocatableRegs_ = tri_->getAllocatableSet(fn); in runOnMachineFunction()
573 if (!i->second->empty() && allocatableRegs_.test(i->second->reg)) { in initIntervalSets()
1011 if (Reg && allocatableRegs_[Reg] && RC->contains(Reg)) in assignRegOrStackSlotAtInterval()
DLiveIntervalAnalysis.cpp122 allocatableRegs_ = tri_->getAllocatableSet(fn); in runOnMachineFunction()
953 !allocatableRegs_[Reg]) in getReMatImplicitUse()
2058 if (allocatableRegs_[*AS] && hasInterval(*AS)) in hasAllocatableSuperReg()
2111 assert(*AS == SpillReg || !allocatableRegs_[*AS] || !hasInterval(*AS) || in spillPhysRegAroundRegDefsUses()