Searched refs:apllcsr (Results 1 – 2 of 2) sorted by relevance
509 reg = readl(&scg1_regs->apllcsr); in decode_pll()961 val = readl(&scg1_regs->apllcsr); in scg_a7_apll_init()963 writel(val, &scg1_regs->apllcsr); in scg_a7_apll_init()975 val = readl(&scg1_regs->apllcsr); in scg_a7_apll_init()977 writel(val, &scg1_regs->apllcsr); in scg_a7_apll_init()980 while (!(readl(&scg1_regs->apllcsr) & SCG_APLL_CSR_APLLVLD_MASK)) in scg_a7_apll_init()
299 u32 apllcsr; /* Auxiliary PLL Control Status Register, offset 0x500 */ member