Searched refs:areg (Results 1 – 9 of 9) sorted by relevance
/external/libffi/src/xtensa/ |
D | ffi.c | 256 int i, areg; in ffi_closure_SYSV_inner() local 262 areg = 0; in ffi_closure_SYSV_inner() 268 areg++; in ffi_closure_SYSV_inner() 277 if (arg_types[i]->alignment == 8 && (areg & 1) != 0) in ffi_closure_SYSV_inner() 278 areg++; in ffi_closure_SYSV_inner() 281 if (areg == FFI_REGISTER_NARGS) in ffi_closure_SYSV_inner() 282 areg += 4; in ffi_closure_SYSV_inner() 287 if (areg < FFI_REGISTER_NARGS && areg + numregs > FFI_REGISTER_NARGS) in ffi_closure_SYSV_inner() 288 areg = FFI_REGISTER_NARGS + 4; in ffi_closure_SYSV_inner() 291 avalue[i] = &values[areg]; in ffi_closure_SYSV_inner() [all …]
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/external/python/cpython2/Modules/_ctypes/libffi/src/xtensa/ |
D | ffi.c | 256 int i, areg; in ffi_closure_SYSV_inner() local 262 areg = 0; in ffi_closure_SYSV_inner() 268 areg++; in ffi_closure_SYSV_inner() 277 if (arg_types[i]->alignment == 8 && (areg & 1) != 0) in ffi_closure_SYSV_inner() 278 areg++; in ffi_closure_SYSV_inner() 281 if (areg == FFI_REGISTER_NARGS) in ffi_closure_SYSV_inner() 282 areg += 4; in ffi_closure_SYSV_inner() 287 if (areg < FFI_REGISTER_NARGS && areg + numregs > FFI_REGISTER_NARGS) in ffi_closure_SYSV_inner() 288 areg = FFI_REGISTER_NARGS + 4; in ffi_closure_SYSV_inner() 291 avalue[i] = &values[areg]; in ffi_closure_SYSV_inner() [all …]
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/external/u-boot/arch/xtensa/include/asm/ |
D | ptrace.h | 108 unsigned long areg[16]; /* 128 (64) */ member
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/external/mesa3d/src/gallium/drivers/r600/sb/ |
D | sb_shader.cpp | 384 unsigned areg = a->base_gpr.sel(); in get_gpr_array() local 385 if (achan == chan && (reg >= areg && reg < areg+a->array_size)) in get_gpr_array()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86InstrArithmetic.td | 879 Register areg, string operands, X86FoldableSchedWrite sched = WriteALU> 884 let Uses = [areg]; 885 let Defs = [areg, EFLAGS]; 892 Register areg, string operands> 893 : BinOpAI<opcode, mnemonic, typeinfo, areg, operands, WriteADC> { 894 let Uses = [areg, EFLAGS]; 899 Register areg, string operands> 900 : BinOpAI<opcode, mnemonic, typeinfo, areg, operands> {
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/external/llvm/lib/Target/X86/ |
D | X86InstrArithmetic.td | 920 Register areg, string operands, 926 let Uses = [areg]; 927 let Defs = [areg, EFLAGS]; 934 Register areg, string operands> 935 : BinOpAI<opcode, mnemonic, typeinfo, areg, operands, 937 let Uses = [areg, EFLAGS]; 942 Register areg, string operands> 943 : BinOpAI<opcode, mnemonic, typeinfo, areg, operands> {
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86InstrArithmetic.td | 869 Register areg, string operands> 874 let Uses = [areg]; 875 let Defs = [areg];
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXIntrinsics.td | 1393 def areg: NVPTXInst<(outs regclass:$result), (ins Int32Regs:$src), 1492 def areg: NVPTXInst<(outs regclass:$result), (ins Int32Regs:$src),
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
D | NVPTXIntrinsics.td | 1714 def areg: NVPTXInst<(outs regclass:$result), (ins Int32Regs:$src), 1825 def areg: NVPTXInst<(outs regclass:$result), (ins Int32Regs:$src),
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