| /external/swiftshader/third_party/subzero/crosstest/ |
| D | test_calling_conv.cpp | 51 v4f32 arg12 = {27, 28, 29, 30}; in caller_vlvilvfvdviv() local
55 arg11, arg12); in caller_vlvilvfvdviv()
81 v4f32 arg10, int arg11, v4f32 arg12) { in callee_vlvilvfvdviv() argument
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | ret.ll | 46 …rg7, <2 x i32> %arg8, <2 x i32> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, flo…
60 %r4 = insertvalue { float, float, float, float, float } %r3, float %arg12, 4
71 …rg7, <2 x i32> %arg8, <2 x i32> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, flo…
85 …rg7, <2 x i32> %arg8, <2 x i32> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, flo…
104 …rg7, <2 x i32> %arg8, <2 x i32> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, flo…
118 %r4 = insertvalue { float, float, float, float, float } %r3, float %arg12, 4
133 …rg7, <2 x i32> %arg8, <2 x i32> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, flo…
147 %r4 = insertvalue { float, float, float, float, float } %r3, float %arg12, 4
162 …rg7, <2 x i32> %arg8, <2 x i32> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, flo…
176 %r4 = insertvalue { float, float, float, float, float } %r3, float %arg12, 4
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| D | callee-special-input-vgprs.ll | 243 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
262 store volatile i32 %arg12, i32 addrspace(1)* undef
342 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
347 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
369 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
388 store volatile i32 %arg12, i32 addrspace(1)* undef
493 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
516 store volatile i32 %arg12, i32 addrspace(1)* undef
590 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
613 store volatile i32 %arg12, i32 addrspace(1)* undef
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| D | llvm.AMDGPU.kill.ll | 23 …2> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, flo…
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| D | smrd.ll | 109 … <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, flo…
123 … <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, flo…
140 … <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, flo…
155 … <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, flo…
170 … <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, flo…
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| D | ret_jump.ll | 25 …2> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, flo…
76 …2> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, flo…
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| D | sgpr-copy.ll | 7 … <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, flo…
31 … <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, flo…
171 … <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, flo…
224 …x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, flo…
288 …x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, flo…
324 …2> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, flo…
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| D | schedule-kernel-arg-loads.ll | 26 i64 %arg8, i64 %arg9, i64 %arg10, i64 %arg11, i64 %arg12, i64 %arg13, i64 %arg14, i64 %arg15,
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| D | si-scheduler.ll | 19 …2> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, flo…
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| D | unigine-liveness-crash.ll | 12 …2> %arg8, <2 x i32> %arg9, <3 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, <2 x i32> %arg13,…
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| D | si-sgpr-spill.ll | 27 …x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, flo…
646 …x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, flo…
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| /external/v8/src/third_party/valgrind/ |
| D | valgrind.h | 1099 arg11,arg12) \ argument
1116 _argvec[12] = (unsigned long)(arg12); \
1631 arg7,arg8,arg9,arg10,arg11,arg12) \ argument
1648 _argvec[12] = (unsigned long)(arg12); \
2090 arg7,arg8,arg9,arg10,arg11,arg12) \ argument
2107 _argvec[12] = (unsigned long)arg12; \
2608 arg7,arg8,arg9,arg10,arg11,arg12) \ argument
2627 _argvec[2+12] = (unsigned long)arg12; \
3039 arg11,arg12) \ argument
3056 _argvec[12] = (unsigned long)(arg12); \
[all …]
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| /external/libchrome/base/third_party/valgrind/ |
| D | valgrind.h | 1143 arg11,arg12) \ argument
1160 _argvec[12] = (unsigned long)(arg12); \
1675 arg7,arg8,arg9,arg10,arg11,arg12) \ argument
1692 _argvec[12] = (unsigned long)(arg12); \
2134 arg7,arg8,arg9,arg10,arg11,arg12) \ argument
2151 _argvec[12] = (unsigned long)arg12; \
2652 arg7,arg8,arg9,arg10,arg11,arg12) \ argument
2671 _argvec[2+12] = (unsigned long)arg12; \
3083 arg11,arg12) \ argument
3100 _argvec[12] = (unsigned long)(arg12); \
[all …]
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | sgpr-copy.ll | 14 … <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, flo…
38 … <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, flo…
159 … <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, flo…
230 …x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, flo…
294 …x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, flo…
324 …2> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, flo…
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| D | schedule-kernel-arg-loads.ll | 31 i64 %arg8, i64 %arg9, i64 %arg10, i64 %arg11, i64 %arg12, i64 %arg13, i64 %arg14, i64 %arg15,
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| D | si-lod-bias.ll | 9 … <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, flo…
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| D | si-scheduler.ll | 19 …2> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, flo…
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| D | si-sgpr-spill.ll | 25 …x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, flo…
675 …x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, flo…
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| /external/llvm/test/Analysis/CFLAliasAnalysis/Steensgaard/ |
| D | stratified-attrs-indexing.ll | 14 i32* %arg11, i32* %arg12, i32* %arg13, i32* %arg14, i32* %arg15,
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CFLAliasAnalysis/Steensgaard/ |
| D | stratified-attrs-indexing.ll | 14 i32* %arg11, i32* %arg12, i32* %arg13, i32* %arg14, i32* %arg15,
|