Searched refs:ba_intlv_ctl (Results 1 – 5 of 5) sorted by relevance
879 popts->ba_intlv_ctl = 0; in populate_memctl_options()1197 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1; in populate_memctl_options()1200 popts->ba_intlv_ctl = FSL_DDR_CS2_CS3; in populate_memctl_options()1203 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_AND_CS2_CS3; in populate_memctl_options()1206 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_CS2_CS3; in populate_memctl_options()1209 popts->ba_intlv_ctl = auto_bank_intlv(pdimm); in populate_memctl_options()1212 switch (popts->ba_intlv_ctl & FSL_DDR_CS0_CS1_CS2_CS3) { in populate_memctl_options()1216 popts->ba_intlv_ctl = 0; in populate_memctl_options()1227 popts->ba_intlv_ctl = 0; in populate_memctl_options()1233 popts->ba_intlv_ctl = 0; in populate_memctl_options()[all …]
797 unsigned int ba_intlv_ctl; /* Bank (CS) interleaving control */ in set_ddr_sdram_cfg() local842 ba_intlv_ctl = popts->ba_intlv_ctl; in set_ddr_sdram_cfg()860 | ((ba_intlv_ctl & 0x7F) << 8) in set_ddr_sdram_cfg()2441 switch (popts->ba_intlv_ctl & FSL_DDR_CS0_CS1_CS2_CS3) { in compute_fsl_memctl_config_regs()2467 switch (popts->ba_intlv_ctl & FSL_DDR_CS0_CS1_CS2_CS3) { in compute_fsl_memctl_config_regs()
311 switch (pinfo->memctl_opts[first_ctrl].ba_intlv_ctl & in __step_assign_addresses()
544 CTRL_OPTIONS(ba_intlv_ctl), in fsl_ddr_options_edit()839 CTRL_OPTIONS_HEX(ba_intlv_ctl), in print_memctl_options()
346 unsigned int ba_intlv_ctl; member