| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| D | radeon_drm_surface.c | 152 surf_drm->bankh = surf_ws->u.legacy.bankh; in surf_winsys_to_drm()
194 surf_ws->u.legacy.bankh = surf_drm->bankh; in surf_drm_to_winsys()
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| D | radeon_drm_bo.c | 864 …md->u.legacy.bankh = (args.tiling_flags >> RADEON_TILING_EG_BANKH_SHIFT) & RADEON_TILING_EG_BANKH_… in radeon_bo_get_metadata()
893 args.tiling_flags |= (md->u.legacy.bankh & RADEON_TILING_EG_BANKH_MASK) << in radeon_bo_set_metadata()
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| /external/libdrm/radeon/ |
| D | radeon_surface.c | 676 mtileh = (tileh * surf->bankh * surf_man->hw_info.num_banks) / surf->mtilea; in eg_surface_init_2d()
770 switch (surf->bankh) { in eg_surface_sanity()
780 if ((tileb * surf->bankh * surf->bankw) < surf_man->hw_info.group_bytes) { in eg_surface_sanity()
920 surf->bankh = 1; in eg_surface_best()
923 for (; surf->bankh <= 8; surf->bankh *= 2) { in eg_surface_best()
924 if ((tileb * surf->bankh * surf->bankw) >= surf_man->hw_info.group_bytes) { in eg_surface_best()
1001 surf->bankh = 4; in eg_surface_best()
1005 surf->bankh = 2; in eg_surface_best()
1008 surf->bankh = 1; in eg_surface_best()
1012 for (; surf->bankh <= 8; surf->bankh *= 2) { in eg_surface_best()
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| D | radeon_surface.h | 131 uint32_t bankh; member
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | radeon_video.c | 153 wh = surfaces[i]->u.legacy.bankw * surfaces[i]->u.legacy.bankh; in si_vid_join_surfaces()
171 surfaces[i]->u.legacy.bankh = surfaces[best_tiling]->u.legacy.bankh; in si_vid_join_surfaces()
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| D | radeon_winsys.h | 193 unsigned bankh; member
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| D | r600_texture.c | 341 metadata->u.legacy.bankh = surface->u.legacy.bankh; in r600_texture_init_metadata()
369 surf->u.legacy.bankh = metadata->u.legacy.bankh; in r600_surface_import_metadata()
882 out->bank_height = fmask.u.legacy.bankh; in si_texture_get_fmask_info()
1121 rtex->surface.u.legacy.bankh, rtex->surface.u.legacy.num_banks, rtex->surface.u.legacy.mtilea, in si_print_texture_info()
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| D | radeon_uvd.c | 1610 assert(luma->u.legacy.bankh == chroma->u.legacy.bankh); in si_uvd_set_dt_surfaces()
1615 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->u.legacy.bankh)); in si_uvd_set_dt_surfaces()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | radeon_video.c | 160 wh = surfaces[i]->u.legacy.bankw * surfaces[i]->u.legacy.bankh; in rvid_join_surfaces()
176 surfaces[i]->u.legacy.bankh = surfaces[best_tiling]->u.legacy.bankh; in rvid_join_surfaces()
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| D | r600_texture.c | 286 metadata->u.legacy.bankh = surface->u.legacy.bankh; in r600_texture_init_metadata()
302 surf->u.legacy.bankh = metadata->u.legacy.bankh; in r600_surface_import_metadata()
592 fmask.u.legacy.bankh = rtex->surface.u.legacy.bankh; in r600_texture_get_fmask_info()
597 fmask.u.legacy.bankh = 4; in r600_texture_get_fmask_info()
633 out->bank_height = fmask.u.legacy.bankh; in r600_texture_get_fmask_info()
823 rtex->surface.u.legacy.bankh, rtex->surface.u.legacy.num_banks, rtex->surface.u.legacy.mtilea, in r600_print_texture_info()
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| D | evergreen_state.c | 719 unsigned macro_aspect, tile_split, bankh, bankw, nbanks, fmask_bankh; in evergreen_fill_tex_resource_words() local
799 bankh = tmp->surface.u.legacy.bankh; in evergreen_fill_tex_resource_words()
803 bankh = eg_bank_wh(bankh); in evergreen_fill_tex_resource_words()
887 S_03001C_BANK_HEIGHT(bankh) | in evergreen_fill_tex_resource_words()
1109 unsigned non_disp_tiling, macro_aspect, tile_split, bankh, bankw, fmask_bankh, nbanks; in evergreen_set_color_surface_common() local
1148 bankh = rtex->surface.u.legacy.bankh; in evergreen_set_color_surface_common()
1152 fmask_bankh = rtex->surface.u.legacy.bankh; in evergreen_set_color_surface_common()
1156 bankh = eg_bank_wh(bankh); in evergreen_set_color_surface_common()
1173 S_028C74_BANK_HEIGHT(bankh) | in evergreen_set_color_surface_common()
1345 unsigned macro_aspect, tile_split, bankh, bankw, nbanks; in evergreen_init_depth_surface() local
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| D | radeon_uvd.c | 1485 assert(luma->u.legacy.bankh == chroma->u.legacy.bankh); in ruvd_set_dt_surfaces()
1490 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->u.legacy.bankh)); in ruvd_set_dt_surfaces()
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| /external/mesa3d/src/amd/common/ |
| D | ac_surface.h | 84 unsigned bankh:4; /* max 8 */ member
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| D | ac_surface.c | 433 surf->u.legacy.bankh = csio->pTileInfo->bankHeight; in gfx6_surface_settings()
629 surf->u.legacy.bankw && surf->u.legacy.bankh && in gfx6_compute_surface()
637 AddrTileInfoIn.bankHeight = surf->u.legacy.bankh; in gfx6_compute_surface()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_radeon_winsys.h | 137 unsigned bankh; member
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| D | radv_image.c | 640 metadata->u.legacy.bankh = surface->u.legacy.bankh; in radv_init_metadata()
703 out->bank_height = fmask.u.legacy.bankh; in radv_image_get_fmask_info()
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| D | radv_device.c | 3274 unsigned bankh = util_logbase2(iview->image->surface.u.legacy.bankh); in radv_initialise_color_surface() local
3275 cb->cb_color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh); in radv_initialise_color_surface()
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| /external/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| D | radv_amdgpu_bo.c | 519 tiling_flags |= AMDGPU_TILING_SET(BANK_HEIGHT, util_logbase2(md->u.legacy.bankh)); in radv_amdgpu_winsys_bo_set_metadata()
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| /external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
| D | amdgpu_bo.c | 1105 md->u.legacy.bankh = 1 << AMDGPU_TILING_GET(tiling_flags, BANK_HEIGHT); in amdgpu_buffer_get_metadata()
1137 tiling_flags |= AMDGPU_TILING_SET(BANK_HEIGHT, util_logbase2(md->u.legacy.bankh)); in amdgpu_buffer_set_metadata()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_state.c | 2477 unsigned bankh = util_logbase2(rtex->surface.u.legacy.bankh); in si_initialize_color_surface() local
2478 color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh); in si_initialize_color_surface()
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