| /external/u-boot/arch/arm/cpu/armv8/zynqmp/ |
| D | cpu.c | 73 int banks = ZYNQMP_MEM_MAP_USED; in mem_map_fill() local
76 zynqmp_mem_map[banks].virt = 0xffe00000UL; in mem_map_fill()
77 zynqmp_mem_map[banks].phys = 0xffe00000UL; in mem_map_fill()
78 zynqmp_mem_map[banks].size = 0x00200000UL; in mem_map_fill()
79 zynqmp_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | in mem_map_fill()
81 banks = banks + 1; in mem_map_fill()
90 zynqmp_mem_map[banks].virt = gd->bd->bi_dram[i].start; in mem_map_fill()
91 zynqmp_mem_map[banks].phys = gd->bd->bi_dram[i].start; in mem_map_fill()
92 zynqmp_mem_map[banks].size = gd->bd->bi_dram[i].size; in mem_map_fill()
93 zynqmp_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | in mem_map_fill()
[all …]
|
| /external/mesa3d/src/amd/addrlib/r800/ |
| D | egbaddrlib.cpp | 947 macroTileHeight = MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks / in ComputeSurfaceAlignmentsMacroTiled()
957 pipes * pTileInfo->bankWidth * pTileInfo->banks * pTileInfo->bankHeight * tileSize; in ComputeSurfaceAlignmentsMacroTiled()
982 switch (pTileInfo->banks) in SanityCheckMacroTiled()
1042 if (pTileInfo->banks < pTileInfo->macroAspectRatio) in SanityCheckMacroTiled()
1065 ADDR_ASSERT(numPipes * pTileInfo->banks >= 4); in SanityCheckMacroTiled()
1497 (MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks) / in ComputeMacroTileEquation()
1644 UINT_32 numBankBits = Log2(pTileInfo->banks); in ComputeSurfaceAddrFromCoordMacroTiled()
1738 (MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks) / pTileInfo->macroAspectRatio; in ComputeSurfaceAddrFromCoordMacroTiled()
1746 (numPipes * pTileInfo->banks); in ComputeSurfaceAddrFromCoordMacroTiled()
2355 UINT_32 banks = pTileInfo->banks; in ComputeSurfaceCoordFromAddrMacroTiled() local
[all …]
|
| D | ciaddrlib.cpp | 243 pOut->dccRamBaseAlign = pIn->tileInfo.banks * in HwlComputeDccInfo()
301 UINT_32 numOfBanks = pIn->pTileInfo->banks; in HwlComputeCmaskAddrFromCoord()
345 UINT_32 numOfBanks = pIn->pTileInfo->banks; in HwlComputeHtileAddrFromCoord()
608 pInfo->banks = 2; in HwlSetupTileCfg()
963 tileInfo.banks * tileInfo.bankWidth * in HwlOptimizeTileMode()
1488 HwlGetPipes(&tileInfo) * tileInfo.banks * in HwlSetupTileInfo()
1499 HwlGetPipes(&tileInfo) * tileInfo.banks * in HwlSetupTileInfo()
1636 pCfg->info.banks = 2; in ReadGbTileMode()
1731 pCfg->banks = 1 << (gbTileMode.f.num_banks + 1); in ReadGbMacroTileCfg()
2182 UINT_64 baseAlign = tileSize * pipes * m_macroTileTable[i].banks * in HwlGetMaxAlignments()
[all …]
|
| /external/u-boot/drivers/ram/ |
| D | bmips_ram.c | 65 unsigned int is_32b, unsigned int banks) in bmips_dram_size() argument
71 return 1 << (cols + rows + is_32b + banks); in bmips_dram_size()
76 unsigned int cols = 0, rows = 0, is_32b = 0, banks = 0; in bcm6338_get_ram_size() local
83 banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1; in bcm6338_get_ram_size()
85 return bmips_dram_size(cols, rows, is_32b, banks); in bcm6338_get_ram_size()
|
| /external/speex/libspeexdsp/ |
| D | filterbank.c | 54 FilterBank *filterbank_new(int banks, spx_word32_t sampling, int len, int type) in filterbank_new() argument
64 mel_interval = PDIV32(max_mel,banks-1); in filterbank_new()
67 bank->nb_banks = banks; in filterbank_new()
75 bank->scaling = (float*)speex_alloc(banks*sizeof(float)); in filterbank_new()
91 if (id1>banks-2) in filterbank_new()
93 id1 = banks-2; in filterbank_new()
|
| D | filterbank.h | 52 FilterBank *filterbank_new(int banks, spx_word32_t sampling, int len, int type);
|
| /external/mesa3d/src/intel/compiler/ |
| D | brw_fs_bank_conflicts.cpp | 798 weight_vector_type *banks = new weight_vector_type[4]; in bank_characteristics() local
801 banks[b] = weight_vector_type(2 * map.size); in bank_characteristics()
805 set(banks[b], j, p, in bank_characteristics()
810 return banks; in bank_characteristics()
828 weight_vector_type *banks = bank_characteristics(map); in optimize_reg_permutation() local
844 delta_conflicts(banks[bank_r], banks[bank_s], conflicts[r]) + in optimize_reg_permutation()
845 delta_conflicts(banks[bank_s], banks[bank_r], conflicts[s]); in optimize_reg_permutation()
857 swap(banks[b], r, p, best_s, p); in optimize_reg_permutation()
865 delete[] banks; in optimize_reg_permutation()
|
| /external/u-boot/board/freescale/mx6memcal/ |
| D | spl.c | 249 .banks = 8,
263 .banks = 8,
277 .banks = 8,
291 .banks = 8,
305 .banks = 8,
319 .banks = 8,
|
| /external/brotli/c/enc/ |
| D | hash_forgetful_chain_inc.h | 52 FN(Bank) banks[NUM_BANKS];
111 self->banks[bank].slots[idx].delta = (uint16_t)delta; in FN()
112 self->banks[bank].slots[idx].next = self->head[key]; in FN()
215 slot = self->banks[bank].slots[last].next; in FN()
216 delta = self->banks[bank].slots[last].delta; in FN()
|
| /external/u-boot/board/gateworks/gw_ventana/ |
| D | gw_ventana_spl.c | 153 .banks = 8,
167 .banks = 8,
181 .banks = 8,
195 .banks = 8,
|
| /external/u-boot/arch/arm/dts/ |
| D | sama5d3.dtsi | 1388 atmel,nb-banks = <1>;
1394 atmel,nb-banks = <3>;
1402 atmel,nb-banks = <3>;
1410 atmel,nb-banks = <2>;
1417 atmel,nb-banks = <2>;
1424 atmel,nb-banks = <2>;
1431 atmel,nb-banks = <2>;
1438 atmel,nb-banks = <2>;
1445 atmel,nb-banks = <2>;
1451 atmel,nb-banks = <2>;
[all …]
|
| D | sama5d4.dtsi | 142 atmel,nb-banks = <1>;
148 atmel,nb-banks = <3>;
156 atmel,nb-banks = <3>;
164 atmel,nb-banks = <2>;
172 atmel,nb-banks = <2>;
180 atmel,nb-banks = <2>;
188 atmel,nb-banks = <2>;
196 atmel,nb-banks = <2>;
204 atmel,nb-banks = <2>;
211 atmel,nb-banks = <2>;
[all …]
|
| D | at91sam9rl.dtsi | 306 atmel,nb-banks = <1>;
312 atmel,nb-banks = <2>;
320 atmel,nb-banks = <2>;
328 atmel,nb-banks = <3>;
335 atmel,nb-banks = <3>;
342 atmel,nb-banks = <3>;
350 atmel,nb-banks = <3>;
|
| /external/u-boot/drivers/pinctrl/meson/ |
| D | pinctrl-meson.c | 135 if (pin >= priv->data->banks[i].first && in meson_gpio_calc_reg_and_bit()
136 pin <= priv->data->banks[i].last) { in meson_gpio_calc_reg_and_bit()
137 bank = &priv->data->banks[i]; in meson_gpio_calc_reg_and_bit()
|
| /external/u-boot/common/ |
| D | fdt_support.c | 417 int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) in fdt_fixup_memory_banks() argument
423 if (banks > MEMORY_BANKS_MAX) { in fdt_fixup_memory_banks()
426 __FUNCTION__, banks, MEMORY_BANKS_MAX); in fdt_fixup_memory_banks()
449 for (i = 0; i < banks; i++) { in fdt_fixup_memory_banks()
454 banks = i; in fdt_fixup_memory_banks()
456 if (!banks) in fdt_fixup_memory_banks()
459 for (i = 0; i < banks; i++) in fdt_fixup_memory_banks()
463 banks = i; in fdt_fixup_memory_banks()
465 len = fdt_pack_reg(blob, tmp, start, size, banks); in fdt_fixup_memory_banks()
|
| /external/u-boot/board/liebherr/mccmon6/ |
| D | spl.c | 135 .banks = 8,
149 .banks = 8,
|
| /external/u-boot/arch/x86/dts/ |
| D | chromebook_samus.dts | 290 * banks 8, ranks 2, rows 14,
364 * banks 8, ranks 2, rows 14,
403 * banks 8, ranks 2, rows 15,
442 * banks 8, ranks 2, rows 15,
|
| /external/u-boot/include/ |
| D | fdt_support.h | 96 int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks);
99 int banks) in fdt_fixup_memory_banks() argument
|
| /external/u-boot/drivers/ddr/altera/ |
| D | sdram_gen5.c | 51 const unsigned int banks = in get_errata_rows() local
66 debug("workaround rows - banks %d\n", banks); in get_errata_rows()
72 newrows = lldiv(newrows, (1 << banks) * (1 << cols)); in get_errata_rows()
|
| /external/u-boot/board/toradex/colibri_imx6/ |
| D | pf0100_otp.inc | 66 {pmic_i2c, 0xF0, 0x1F}, // Enable ECC for fuse banks 1 to 5 by writing to OTP EN ECC0 register
67 {pmic_i2c, 0xF1, 0x1F}, // Enable ECC for fuse banks 6 to 10 by writing to OTP EN ECC1 register
69 {pmic_i2c, 0xD0, 0x1F}, // Set Auto ECC for fuse banks 1 to 5 by writing to OTP AUTO ECC0 register
70 {pmic_i2c, 0xD1, 0x1F}, // Set Auto ECC for fuse banks 6 to 10 by writing to OTP AUTO ECC1 register
|
| /external/u-boot/board/freescale/t4qds/ |
| D | README | 10 32 lanes grouped into four 8-lane banks
11 Two “front side” banks dedicated to Ethernet
18 Two “back side” banks dedicated to other protocols
39 - NOR devices support 16 virtual banks
|
| /external/u-boot/board/toradex/apalis_imx6/ |
| D | pf0100_otp.inc | 68 {pmic_i2c, 0xF0, 0x1F}, // Enable ECC for fuse banks 1 to 5 by writing to OTP EN ECC0 register
69 {pmic_i2c, 0xF1, 0x1F}, // Enable ECC for fuse banks 6 to 10 by writing to OTP EN ECC1 register
71 {pmic_i2c, 0xD0, 0x1F}, // Set Auto ECC for fuse banks 1 to 5 by writing to OTP AUTO ECC0 register
72 {pmic_i2c, 0xD1, 0x1F}, // Set Auto ECC for fuse banks 6 to 10 by writing to OTP AUTO ECC1 register
|
| /external/bouncycastle/bcprov/src/main/java/org/bouncycastle/math/ec/ |
| D | LongArray.java | 1207 int width, positions, top, banks; in modMultiplyAlt() local
1213 width = 4; positions = 16; top = 64; banks = 8; in modMultiplyAlt()
1224 int bTotal = bMax * banks, stride = width * banks; in modMultiplyAlt()
1254 for (int bank = 1; bank < banks; ++bank) in modMultiplyAlt()
1288 if (++bank == banks) in modMultiplyAlt()
1316 shiftUp(c, aLen, bTotal, banks); in modMultiplyAlt()
|
| /external/bouncycastle/repackaged/bcprov/src/main/java/com/android/org/bouncycastle/math/ec/ |
| D | LongArray.java | 1208 int width, positions, top, banks; in modMultiplyAlt() local
1214 width = 4; positions = 16; top = 64; banks = 8; in modMultiplyAlt()
1225 int bTotal = bMax * banks, stride = width * banks; in modMultiplyAlt()
1255 for (int bank = 1; bank < banks; ++bank) in modMultiplyAlt()
1289 if (++bank == banks) in modMultiplyAlt()
1317 shiftUp(c, aLen, bTotal, banks); in modMultiplyAlt()
|
| /external/u-boot/board/phytec/pfla02/ |
| D | pfla02.c | 498 .banks = 8,
513 .banks = 8,
528 .banks = 8,
|