/external/clang/test/CodeGen/ |
D | ms_struct-bitfield-init.c | 18 char bar0; member 60 if (t2.bar0 != 'a' || t2.bar8 != 'i') in main()
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/external/llvm/test/CodeGen/PowerPC/ |
D | swaps-le-6.ll | 11 define void @bar0() { 20 ; CHECK-LABEL: @bar0
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D | swaps-le-5.ll | 9 define void @bar0(double %y) { 17 ; CHECK-LABEL: @bar0
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D | fast-isel-call.ll | 80 define i32 @bar0(i32 %i) nounwind { 87 ; store i32 (i32)* @bar0, i32 (i32)** %fptr, align 8
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/external/adhd/cras/src/tests/ |
D | dsp_ini_unittest.cc | 145 struct port *bar0 = ARRAY_ELEMENT(&bar->ports, 0); in TEST_F() local 147 EXPECT_EQ(PORT_INPUT, bar0->direction); in TEST_F() 148 EXPECT_EQ(PORT_AUDIO, bar0->type); in TEST_F() 151 EXPECT_EQ(1, bar0->flow_id); in TEST_F()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/PGOProfile/ |
D | noreturncall.ll | 9 declare i32 @bar0(i32) 24 %call = call i32 @bar0(i32 %i)
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/external/llvm/test/CodeGen/ARM/ |
D | fast-isel-call.ll | 150 define i32 @bar0(i32 %i) nounwind { 156 ; ARM: {{(movw r1, :lower16:_?bar0)|(ldr r1, .LCPI)}} 157 ; ARM: {{(movt r1, :upper16:_?bar0)|(ldr r1, \[r1\])}} 160 ; THUMB: {{(movw r1, :lower16:_?bar0)|(ldr.n r1, .LCPI)}} 161 ; THUMB: {{(movt r1, :upper16:_?bar0)|(ldr r1, \[r1\])}} 164 store i32 (i32)* @bar0, i32 (i32)** %fptr, align 8
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | swaps-le-6.ll | 22 define void @bar0() { 23 ; CHECK-LABEL: bar0: 34 ; CHECK-P9-LABEL: bar0:
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D | swaps-le-5.ll | 9 define void @bar0(double %y) { 17 ; CHECK-LABEL: @bar0
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D | fast-isel-call.ll | 80 define i32 @bar0(i32 %i) nounwind { 87 ; store i32 (i32)* @bar0, i32 (i32)** %fptr, align 8
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D | stack-no-redzone.ll | 30 %t0 = tail call i32 bitcast (i32 (...)* @bar0 to i32 ()*)() #0 143 declare i32 @bar0(...) local_unnamed_addr #0
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | fast-isel-call.ll | 153 define i32 @bar0(i32 %i) nounwind { 159 ; ARM: {{(movw r[0-9]+, :lower16:_?bar0)|(ldr r[0-9]+, .LCPI)}} 160 ; ARM: {{(movt r[0-9]+, :upper16:_?bar0)|(ldr r[0-9]+, \[r[0-9]+\])}} 163 ; THUMB: {{(movw r[0-9]+, :lower16:_?bar0)|(ldr.n r[0-9]+, .LCPI)}} 164 ; THUMB: {{(movt r[0-9]+, :upper16:_?bar0)|(ldr r[0-9]+, \[r[0-9]+\])}} 168 store i32 (i32)* @bar0, i32 (i32)** %fptr, align 8
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/external/u-boot/drivers/pci/ |
D | pcie_dw_mvebu.c | 444 u32 bar0; in pcie_dw_set_host_bars() local 456 bar0 = CONFIG_SYS_SDRAM_BASE & ~0xf; in pcie_dw_set_host_bars() 457 bar0 |= PCI_BASE_ADDRESS_MEM_TYPE_32; in pcie_dw_set_host_bars()
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/external/clang/test/Sema/ |
D | missing-field-initializers.c | 11 struct Foo bar0[] = { variable
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/external/clang/test/SemaCXX/ |
D | type-definition-in-specifier.cpp | 28 short foo6 (enum bar0 {qq} bar3); // expected-error{{cannot be defined in a parameter type}}
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/external/clang/test/Parser/ |
D | switch-recovery.cpp | 218 bool bar0() {
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/external/llvm/test/CodeGen/X86/ |
D | peephole-na-phys-copy-folding.ll | 170 i64* %foo0, i64 %bar0, i64 %baz0, 172 %cx0 = cmpxchg i64* %foo0, i64 %bar0, i64 %baz0 seq_cst seq_cst
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/external/u-boot/arch/m68k/cpu/mcf547x_8x/ |
D | pci.c | 114 out_be32(&pci->bar0, PCI_BAR_BAR0(CONFIG_SYS_PCI_BAR0)); in pci_mcf547x_8x_init()
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/external/u-boot/arch/m68k/cpu/mcf5445x/ |
D | pci.c | 88 out_be32(&pci->bar0, PCI_BAR_BAR0(CONFIG_SYS_PCI_BAR0)); in pci_mcf5445x_init()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/ |
D | runtime-check-address-space.ll | 55 define void @bar0(i32* %a, i32 addrspace(1)* %b, i32 %n) #0 { 56 ; CHECK-LABEL: @bar0(
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/external/llvm/test/Transforms/LoopVectorize/ |
D | runtime-check-address-space.ll | 55 define void @bar0(i32* %a, i32 addrspace(1)* %b, i32 %n) #0 { 56 ; CHECK-LABEL: @bar0(
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/external/u-boot/arch/m68k/include/asm/ |
D | immap_547x_8x.h | 213 u32 bar0; /* 0x10 Base address register 0 */ member
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D | immap_5445x.h | 249 u32 bar0; /* 0x10 Base address register 0 Register */ member
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | peephole-na-phys-copy-folding.ll | 271 define i64 @test_two_live_flags(i64* %foo0, i64 %bar0, i64 %baz0, i64* %foo1, i64 %bar1, i64 %baz1)… 334 %cx0 = cmpxchg i64* %foo0, i64 %bar0, i64 %baz0 seq_cst seq_cst
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | arm64-vmul.ll | 1380 define <8 x i16> @bar0(<8 x i16> %a, <16 x i8> %b, <16 x i8> %c) nounwind { 1381 ; CHECK-LABEL: bar0:
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