/external/llvm/test/CodeGen/X86/ |
D | 2009-07-16-CoalescerBug.ll | 142 %bcs.0 = phi i32 [ undef, %if.end919 ], [ 0, %if.end887 ] ; <i32> [#uses=5] 182 …%bcs.1 = phi i32 [ %bcs.0, %if.then1086 ], [ %bcs.0, %if.end972 ], [ %bcs.0, %land.lhs.true975 ], … 201 … undef, i32 0, %struct.brinfo** undef, i32 0, %struct.brinfo** undef, i32 %bcs.1, i32* undef) noun…
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/external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
D | 2009-07-16-CoalescerBug.ll | 142 %bcs.0 = phi i32 [ undef, %if.end919 ], [ 0, %if.end887 ] ; <i32> [#uses=5] 182 …%bcs.1 = phi i32 [ %bcs.0, %if.then1086 ], [ %bcs.0, %if.end972 ], [ %bcs.0, %land.lhs.true975 ], … 201 … undef, i32 0, %struct.brinfo** undef, i32 0, %struct.brinfo** undef, i32 %bcs.1, i32* undef) noun…
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | 2009-07-16-CoalescerBug.ll | 142 %bcs.0 = phi i32 [ undef, %if.end919 ], [ 0, %if.end887 ] ; <i32> [#uses=5] 182 …%bcs.1 = phi i32 [ %bcs.0, %if.then1086 ], [ %bcs.0, %if.end972 ], [ %bcs.0, %land.lhs.true975 ], … 201 … undef, i32 0, %struct.brinfo** undef, i32 0, %struct.brinfo** undef, i32 %bcs.1, i32* undef) noun…
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Sparc/ |
D | sparc64-ctrl-instructions.s | 40 ! CHECK: bcs %xcc, .BB0 ! encoding: [0x0a,0b01101AAA,A,A] 42 bcs %xcc, .BB0 272 ! CHECK: bcs,a %icc, .BB0 ! encoding: [0x2a,0b01001AAA,A,A] 274 bcs,a %icc, .BB0 328 ! CHECK: bcs,pn %icc, .BB0 ! encoding: [0x0a,0b01000AAA,A,A] 330 bcs,pn %icc, .BB0 384 ! CHECK: bcs,a,pn %icc, .BB0 ! encoding: [0x2a,0b01000AAA,A,A] 386 bcs,a,pn %icc, .BB0 440 ! CHECK: bcs %icc, .BB0 ! encoding: [0x0a,0b01001AAA,A,A] 442 bcs,pt %icc, .BB0 [all …]
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D | sparc-ctrl-instructions.s | 103 ! CHECK: bcs .BB0 ! encoding: [0x0a,0b10AAAAAA,A,A] 105 bcs .BB0 107 ! CHECK: bcs .BB0 ! encoding: [0x0a,0b10AAAAAA,A,A] 311 ! CHECK: bcs,a .BB0 ! encoding: [0x2a,0b10AAAAAA,A,A] 313 bcs,a .BB0
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/external/llvm/test/MC/Sparc/ |
D | sparc64-ctrl-instructions.s | 40 ! CHECK: bcs %xcc, .BB0 ! encoding: [0x0a,0b01101AAA,A,A] 42 bcs %xcc, .BB0 272 ! CHECK: bcs,a %icc, .BB0 ! encoding: [0x2a,0b01001AAA,A,A] 274 bcs,a %icc, .BB0 328 ! CHECK: bcs,pn %icc, .BB0 ! encoding: [0x0a,0b01000AAA,A,A] 330 bcs,pn %icc, .BB0 384 ! CHECK: bcs,a,pn %icc, .BB0 ! encoding: [0x2a,0b01000AAA,A,A] 386 bcs,a,pn %icc, .BB0 440 ! CHECK: bcs %icc, .BB0 ! encoding: [0x0a,0b01001AAA,A,A] 442 bcs,pt %icc, .BB0 [all …]
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D | sparc-ctrl-instructions.s | 103 ! CHECK: bcs .BB0 ! encoding: [0x0a,0b10AAAAAA,A,A] 105 bcs .BB0 107 ! CHECK: bcs .BB0 ! encoding: [0x0a,0b10AAAAAA,A,A] 311 ! CHECK: bcs,a .BB0 ! encoding: [0x2a,0b10AAAAAA,A,A] 313 bcs,a .BB0
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/external/llvm/test/MC/AArch64/ |
D | arm64-condbr-without-dots.s | 5 bcs lbl
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | arm64-condbr-without-dots.s | 5 bcs lbl
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/external/u-boot/arch/arm/lib/ |
D | memcpy.S | 81 CALGN( bcs 2f ) 138 CALGN( bcs 2b )
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D | uldivmod.S | 100 bcs L_lsl_1 114 bcs L_subtract
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D | div64.S | 120 6: bcs 5b
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/external/u-boot/arch/arm/include/asm/arch-mx25/ |
D | imx-regs.h | 477 #define WEIM_CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \ argument 479 ((sp) << 31 | (wp) << 30 | (bcd) << 28 | (bcs) << 24 | \
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/external/libdrm/radeon/ |
D | radeon_cs_gem.c | 341 bof_t *bcs, *blob, *array, *bo, *size, *handle, *device_id, *root; in cs_gem_dump_bof() local 346 root = device_id = bcs = blob = array = bo = size = handle = NULL; in cs_gem_dump_bof()
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/external/u-boot/arch/arm/include/asm/ |
D | macro.h | 58 bcs 1b
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/external/llvm/test/MC/Disassembler/Sparc/ |
D | sparc.txt | 114 # CHECK: bcs 4194303
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Sparc/ |
D | sparc.txt | 114 # CHECK: bcs 4194303
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/external/llvm/test/MC/Lanai/ |
D | v11.s | 63 bcs 0x123454 label 103 bcs.r 0x5678
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Lanai/ |
D | v11.s | 63 bcs 0x123454 label 103 bcs.r 0x5678
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/ |
D | minmax-fold.ll | 633 %bcs = bitcast i32 %sel to float 634 ret float %bcs 670 %bcs = bitcast <8 x i32> %sel to <8 x float> 671 ret <8 x float> %bcs
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/external/u-boot/arch/arm/include/asm/arch-mx31/ |
D | imx-regs.h | 639 #define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \ argument
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/external/capstone/arch/Sparc/ |
D | SparcGenAsmWriter.inc | 1308 AsmString = "bcs $\x01"; 1422 AsmString = "bcs,a $\x01"; 1828 AsmString = "bcs,a,pn %icc, $\x01"; 1942 AsmString = "bcs,pn %icc, $\x01"; 2056 AsmString = "bcs,a,pn %xcc, $\x01"; 2170 AsmString = "bcs,pn %xcc, $\x01";
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/external/honggfuzz/examples/apache-httpd/corpus_http2/ |
D | 2cfec8fd890dd49336ff86399560803c.00006de7.honggfuzz.cov | 72 …����L��l�M�"˼�4GAx}"c���du-�b�=���x�V�è �pK����L��5�>{�S�A��z�bcs�.K�38�r���O���…
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D | de083c78831712019f9b55b2a790eaea.0000fa17.honggfuzz.cov | 287 …a�ﱤ����~ o!bu䛿g�ӻ�]��|ʄ��Zq����\�@��ؐU� ��.�S���.���K�B9)~�T(+?��bcs%��O���k�z)�x��8…
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/external/honggfuzz/examples/apache-httpd/corpus_http1/ |
D | de083c78831712019f9b55b2a790eaea.0000fa17.honggfuzz.cov | 287 …a�ﱤ����~ o!bu䛿g�ӻ�]��|ʄ��Zq����\�@��ؐU� ��.�S���.���K�B9)~�T(+?��bcs%��O���k�z)�x��8…
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