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Searched refs:beqzc (Results 1 – 25 of 64) sorted by relevance

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/external/llvm/test/CodeGen/Mips/
Datomic.ll46 ; MICROMIPS: beqzc $[[R4]], $[[BB0]]
47 ; MIPSR6: beqzc $[[R4]], $[[BB0]]
68 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
69 ; MIPSR6: beqzc $[[R2]], $[[BB0]]
89 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
90 ; MIPSR6: beqzc $[[R2]], $[[BB0]]
114 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
115 ; MIPSR6: beqzc $[[R2]], $[[BB0]]
156 ; MICROMIPS: beqzc $[[R16]], $[[BB0]]
157 ; MIPSR6: beqzc $[[R16]], $[[BB0]]
[all …]
Dmicromips-atomic.ll17 ; CHECK: beqzc $[[R2]], $[[BB0]]
Dfpbr.ll86 ; 64-GPR: beqzc $[[GPRCC]], $BB2_2
177 ; 64-GPR: beqzc $[[GPRCC]], $BB5_2
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/compactbranches/
Dno-beqzc-bnezc.ll8 ; bnezc and beqzc have restriction that $rt != 0
26 ; CHECK-NOT: beqzc $0
73 ; CHECK-NOT: beqzc $0
106 ; CHECK: beqzc ${{[0-9]+}}, $BB
Dcompact-branch-policy.ll12 ; ALWAYS: beqzc
14 ; immediately following beqzc would cause a forbidden slot hazard.
Dunsafe-in-forbidden-slot.ll19 ; CHECK: beqzc
Dcompact-branches.ll171 ; CHECK: beqzc
196 ; CHECK: beqzc
Dcompact-branches-64.ll162 ; CHECK: beqzc
183 ; CHECK: beqzc
/external/llvm/test/CodeGen/Mips/compactbranches/
Dcompact-branch-policy.ll12 ; ALWAYS: beqzc
14 ; immediately following beqzc would cause a forbidden slot hazard.
Dno-beqzc-bnezc.ll5 ; bnezc and beqzc have restriction that $rt != 0
23 ; CHECK-NOT: beqzc $0
Dcompact-branches.ll169 ; CHECK: beqzc
194 ; CHECK: beqzc
/external/llvm/test/MC/Mips/micromips32r6/
Drelocations.s20 # CHECK-FIXUP: beqzc $3, bar # encoding: [0x80,0b011AAAAA,A,A]
42 beqzc $3, bar
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips32r6/
Drelocations.s23 # CHECK-FIXUP: beqzc $3, bar # encoding: [0x80,0b011AAAAA,A,A]
47 beqzc $3, bar
/external/llvm/test/MC/Mips/micromips64r6/
Drelocations.s23 # CHECK-FIXUP: beqzc $3, bar # encoding: [0x80,0b011AAAAA,A,A]
47 beqzc $3, bar
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Datomic.ll101 ; MIPS32R6-NEXT: beqzc $3, $BB0_1
119 ; MIPS32R6O0-NEXT: beqzc $3, $BB0_1
188 ; MIPS64R6-NEXT: beqzc $3, .LBB0_1
205 ; MIPS64R6O0-NEXT: beqzc $5, .LBB0_1
221 ; MM32-NEXT: beqzc $3, $BB0_1
362 ; MIPS32R6-NEXT: beqzc $3, $BB1_1
380 ; MIPS32R6O0-NEXT: beqzc $3, $BB1_1
449 ; MIPS64R6-NEXT: beqzc $3, .LBB1_1
466 ; MIPS64R6O0-NEXT: beqzc $5, .LBB1_1
482 ; MM32-NEXT: beqzc $3, $BB1_1
[all …]
Datomic64.ll88 ; MIPS64R6-NEXT: beqzc $3, .LBB0_1
106 ; MIPS64R6O0-NEXT: beqzc $3, .LBB0_1
248 ; MIPS64R6-NEXT: beqzc $3, .LBB1_1
266 ; MIPS64R6O0-NEXT: beqzc $3, .LBB1_1
408 ; MIPS64R6-NEXT: beqzc $3, .LBB2_1
426 ; MIPS64R6O0-NEXT: beqzc $3, .LBB2_1
568 ; MIPS64R6-NEXT: beqzc $3, .LBB3_1
586 ; MIPS64R6O0-NEXT: beqzc $3, .LBB3_1
728 ; MIPS64R6-NEXT: beqzc $3, .LBB4_1
746 ; MIPS64R6O0-NEXT: beqzc $3, .LBB4_1
[all …]
Dmicromips-atomic.ll19 ; CHECK-NEXT: beqzc $3, $BB0_1
Dfpbr.ll89 ; 64-GPR: beqzc $[[GPRCC]], .LBB2_2
183 ; 64-GPR: beqzc $[[GPRCC]], .LBB5_2
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r6/
Drelocations.s17 # CHECK-FIXUP: beqzc $9, bar # encoding: [0xd9,0b001AAAAA,A,A]
67 beqzc $9, bar
/external/llvm/test/MC/Mips/mips32r6/
Drelocations.s17 # CHECK-FIXUP: beqzc $9, bar # encoding: [0xd9,0b001AAAAA,A,A]
63 beqzc $9, bar
/external/llvm/test/MC/Mips/mips64r6/
Drelocations.s17 # CHECK-FIXUP: beqzc $9, bar # encoding: [0xd9,0b001AAAAA,A,A]
68 beqzc $9, bar
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/
Drelocations.s17 # CHECK-FIXUP: beqzc $9, bar # encoding: [0xd9,0b001AAAAA,A,A]
72 beqzc $9, bar
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/longbranch/
Dcompact-branches-long-branch.ll109 ; CHECK: beqzc
141 ; CHECK: beqzc
/external/llvm/test/MC/Mips/
Drelocation.s224 beqzc $2, foo // RELOC: R_MIPS_PC21_S2 foo
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Drelocation.s243 beqzc $2, foo // RELOC: R_MIPS_PC21_S2 foo

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