| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMSelectionDAGInfo.cpp | 169 if (Src.getValueType().bitsGT(MVT::i32)) in EmitTargetCodeForMemset()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ValueTypes.h | 200 bool bitsGT(EVT VT) const { in bitsGT() function
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| D | MachineValueType.h | 532 bool bitsGT(MVT VT) const { in bitsGT() function
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| /external/llvm/lib/Target/ARM/ |
| D | ARMSelectionDAGInfo.cpp | 91 if (Src.getValueType().bitsGT(MVT::i32)) in EmitSpecializedLibcall()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMSelectionDAGInfo.cpp | 91 if (Src.getValueType().bitsGT(MVT::i32)) in EmitSpecializedLibcall()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ValueTypes.h | 229 bool bitsGT(EVT VT) const { in bitsGT() function
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86SelectionDAGInfo.cpp | 114 if (AVT.bitsGT(MVT::i8)) { in EmitTargetCodeForMemset()
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| D | X86FastISel.cpp | 1955 if (DstVT.bitsGT(SrcVT)) in TargetSelectInstruction()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86SelectionDAGInfo.cpp | 157 if (AVT.bitsGT(MVT::i8)) { in EmitTargetCodeForMemset()
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| /external/llvm/lib/Target/X86/ |
| D | X86SelectionDAGInfo.cpp | 137 if (AVT.bitsGT(MVT::i8)) { in EmitTargetCodeForMemset()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 278 else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex()
624 if (SrcVT.bitsGT(MVT::i32)) in SelectCall()
973 if (DstVT.bitsGT(SrcVT)) in SelectOperator()
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| D | SelectionDAG.cpp | 885 return VT.bitsGT(Op.getValueType()) ? in getAnyExtOrTrunc()
891 return VT.bitsGT(Op.getValueType()) ? in getSExtOrTrunc()
897 return VT.bitsGT(Op.getValueType()) ? in getZExtOrTrunc()
1449 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; in getShiftAmountOperand()
2556 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && in getNode()
2570 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) in getNode()
3383 if (VT.bitsGT(LVT)) in FindOptimalMemOpLowering()
3634 if (MemOps[i].bitsGT(LargestVT)) in getMemsetStores()
3816 if (Src.getValueType().bitsGT(MVT::i32)) in getMemset()
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| D | DAGCombiner.cpp | 2451 if (!LN0->isVolatile() && LoadedVT.bitsGT(ExtVT) && ExtVT.isRound() && in visitAND()
3771 if (VT.bitsGT(VT0)) in visitSELECT()
4213 } else if (Op.getValueType().bitsGT(VT)) { in visitZERO_EXTEND()
4231 } else if (X.getValueType().bitsGT(VT)) { in visitZERO_EXTEND()
4446 if (TruncOp.getValueType().bitsGT(VT)) in visitANY_EXTEND()
4461 } else if (X.getValueType().bitsGT(VT)) { in visitANY_EXTEND()
4865 else if (N0.getOperand(0).getValueType().bitsGT(VT)) in visitTRUNCATE()
6812 InVal = OpVT.bitsGT(InVal.getValueType()) ? in visitINSERT_VECTOR_ELT()
6859 if (!BCVT.isVector() || ExtVT.bitsGT(BCVT.getVectorElementType())) in visitEXTRACT_VECTOR_ELT()
7538 if (XType.bitsGT(AType)) { in SimplifySelectCC()
[all …]
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| D | LegalizeTypes.cpp | 986 if (Index.getValueType().bitsGT(TLI.getPointerTy())) in GetVectorElementPointer()
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| D | LegalizeDAG.cpp | 664 unsigned CastOpc = IdxVT.bitsGT(PtrVT) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; in PerformInsertVectorEltInMemory()
1772 if (Idx.getValueType().bitsGT(TLI.getPointerTy())) in ExpandExtractFromVectorThroughStack()
1815 if (Idx.getValueType().bitsGT(TLI.getPointerTy())) in ExpandInsertToVectorThroughStack()
2509 } else if (DestVT.bitsGT(MVT::f64)) { in ExpandLegalINT_TO_FP()
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ValueTypes.h | 536 bool bitsGT(EVT VT) const { in bitsGT() function
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 1077 return VT.bitsGT(Op.getValueType()) in getFPExtendOrRound()
1083 return VT.bitsGT(Op.getValueType()) ? in getAnyExtOrTrunc()
1089 return VT.bitsGT(Op.getValueType()) ? in getSExtOrTrunc()
1095 return VT.bitsGT(Op.getValueType()) ? in getZExtOrTrunc()
3739 if (SVT.bitsGT(VT.getScalarType())) in FoldCONCAT_VECTORS()
4031 assert(Operand.getValueType().bitsGT(VT) && in getNode()
4041 if (Operand.getOperand(0).getValueType().bitsGT(VT)) in getNode()
4283 if (V1->getValueType(0).bitsGT(SVT)) in FoldConstantArithmetic()
4285 if (V2->getValueType(0).bitsGT(SVT)) in FoldConstantArithmetic()
4386 if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT)) in FoldConstantVectorArithmetic()
[all …]
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| D | FastISel.cpp | 521 } else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex()
1860 if (DstVT.bitsGT(SrcVT)) in selectOperator()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/ |
| D | MachineValueType.h | 772 bool bitsGT(MVT VT) const { in bitsGT() function
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 1002 return VT.bitsGT(Op.getValueType()) ? in getAnyExtOrTrunc()
1008 return VT.bitsGT(Op.getValueType()) ? in getSExtOrTrunc()
1014 return VT.bitsGT(Op.getValueType()) ? in getZExtOrTrunc()
2874 if (SVT.bitsGT(VT.getScalarType())) in FoldCONCAT_VECTORS()
3134 assert(Operand.getValueType().bitsGT(VT) && in getNode()
3144 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) in getNode()
3437 if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT)) in FoldConstantVectorArithmetic()
4224 if (VT.bitsGT(LVT)) in FindOptimalMemOpLowering()
4555 if (MemOps[i].bitsGT(LargestVT)) in getMemsetStores()
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| D | FastISel.cpp | 332 } else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex()
1655 if (DstVT.bitsGT(SrcVT)) in selectOperator()
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| D | DAGCombiner.cpp | 3034 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound()) in isAndLoadExtLoad()
5114 if (VT.bitsGT(VT0)) in visitSELECT()
6302 if (VT.bitsGT(Op.getValueType())) in visitZERO_EXTEND()
6359 } else if (SrcVT.bitsGT(VT)) { in visitZERO_EXTEND()
6378 } else if (X.getValueType().bitsGT(VT)) { in visitZERO_EXTEND()
6605 if (TruncOp.getValueType().bitsGT(VT)) in visitANY_EXTEND()
6620 } else if (X.getValueType().bitsGT(VT)) { in visitANY_EXTEND()
7097 if (N0.getOperand(0).getValueType().bitsGT(VT)) in visitTRUNCATE()
12245 InVal = OpVT.bitsGT(InVal.getValueType()) ? in visitINSERT_VECTOR_ELT()
12297 if (ResultVT.bitsGT(VecEltVT)) { in ReplaceExtractVectorEltOfLoadWithNarrowedLoad()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 1682 return VT.bitsGT(MVT::i32) && Align % 4 == 0; in allowsMisalignedMemoryAccesses()
1928 InVal = OpVT.bitsGT(InVal.getValueType()) ? in PerformDAGCombine()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 1834 return VT.bitsGT(MVT::i32) && Align % 4 == 0; in allowsMisalignedMemoryAccesses()
2037 InVal = OpVT.bitsGT(InVal.getValueType()) ? in PerformDAGCombine()
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 2256 if (N1.getValueType().bitsGT(ShiftVT)) in LowerI8Math()
2273 if (N1VT.bitsGT(ShiftVT)) in LowerI8Math()
|