| /external/libaom/libaom/aom_util/ |
| D | debug_util.c | 120 int pixel_r, int blk_w, int blk_h, int highbd) { in mismatch_record_block_pre() argument
121 if (pixel_c + blk_w >= frame_stride || pixel_r + blk_h >= frame_height) { in mismatch_record_block_pre()
128 for (int c = 0; c < blk_w; ++c) { in mismatch_record_block_pre()
142 ref_pixel_c < pixel_c + blk_w && ref_pixel_r >= pixel_r && in mismatch_record_block_pre()
147 frame_idx_w, frame_offset, plane, pixel_c, pixel_r, blk_w, blk_h); in mismatch_record_block_pre()
153 int pixel_r, int blk_w, int blk_h, int highbd) { in mismatch_record_block_tx() argument
154 if (pixel_c + blk_w >= frame_stride || pixel_r + blk_h >= frame_height) { in mismatch_record_block_tx()
161 for (int c = 0; c < blk_w; ++c) { in mismatch_record_block_tx()
174 ref_pixel_c >= pixel_c && ref_pixel_c < pixel_c + blk_w && in mismatch_record_block_tx()
179 frame_idx_w, frame_offset, plane, pixel_c, pixel_r, blk_w, blk_h); in mismatch_record_block_tx()
[all …]
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| D | debug_util.h | 53 int pixel_r, int blk_w, int blk_h, int highbd);
56 int pixel_r, int blk_w, int blk_h, int highbd);
59 int pixel_r, int blk_w, int blk_h, int highbd);
62 int pixel_r, int blk_w, int blk_h, int highbd);
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | cik_sdma.c | 110 static unsigned minify_as_blocks(unsigned width, unsigned level, unsigned blk_w) in minify_as_blocks() argument
113 return DIV_ROUND_UP(width, blk_w); in minify_as_blocks()
171 dst_level, rdst->surface.blk_w); in cik_sdma_copy_texture()
173 src_level, rsrc->surface.blk_w); in cik_sdma_copy_texture()
178 unsigned srcx = src_box->x / rsrc->surface.blk_w; in cik_sdma_copy_texture()
181 unsigned copy_width = DIV_ROUND_UP(src_box->width, rsrc->surface.blk_w); in cik_sdma_copy_texture()
198 dstx /= rdst->surface.blk_w; in cik_sdma_copy_texture()
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| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| D | radeon_drm_surface.c | 103 surf_drm->blk_w = util_format_get_blockwidth(tex->format); in surf_winsys_to_drm()
183 surf_ws->blk_w = surf_drm->blk_w; in surf_drm_to_winsys()
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| /external/libaom/libaom/av1/encoder/mips/msa/ |
| D | temporal_filter_msa.c | 272 uint8_t *frame2_ptr, uint32_t blk_w, in av1_temporal_filter_apply_msa() argument
276 if (8 == (blk_w * blk_h)) { in av1_temporal_filter_apply_msa()
279 } else if (16 == (blk_w * blk_h)) { in av1_temporal_filter_apply_msa()
283 av1_temporal_filter_apply_c(frame1_ptr, stride, frame2_ptr, blk_w, blk_h, in av1_temporal_filter_apply_msa()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_image.c | 80 surface->blk_w = vk_format_get_blockwidth(pCreateInfo->format); in radv_init_surface()
604 image->surface.blk_w, false, false, desc); in radv_query_opaque_metadata()
668 fmask.blk_w = image->surface.blk_w; in radv_image_get_fmask_info()
983 uint32_t blk_w; in radv_image_view_make_descriptor() local
993 assert(image->surface.blk_w % vk_format_get_blockwidth(image->vk_format) == 0); in radv_image_view_make_descriptor()
994 …blk_w = image->surface.blk_w / vk_format_get_blockwidth(image->vk_format) * vk_format_get_blockwid… in radv_image_view_make_descriptor()
1022 blk_w, is_stencil, is_storage_image, descriptor); in radv_image_view_make_descriptor()
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| /external/libdrm/radeon/ |
| D | radeon_surface.c | 176 surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w; in surf_minify()
585 surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w; in eg_surf_minify()
1436 surflevel->nblk_x = (next_power_of_two(surflevel->npix_x) + surf->blk_w - 1) / surf->blk_w; in si_surf_minify()
1440 surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w; in si_surf_minify()
1486 surflevel->nblk_x = (next_power_of_two(surflevel->npix_x) + surf->blk_w - 1) / surf->blk_w; in si_surf_minify_2d()
1490 surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w; in si_surf_minify_2d()
2479 if (!surf->blk_w || !surf->blk_h || !surf->blk_d) { in radeon_surface_sanity()
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| D | radeon_surface.h | 114 uint32_t blk_w; member
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| /external/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| D | radv_amdgpu_surface.c | 45 if (!surf->blk_w || !surf->blk_h) in radv_amdgpu_surface_sanity()
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| /external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
| D | amdgpu_surface.c | 76 surf->blk_w = util_format_get_blockwidth(tex->format); in amdgpu_surface_init()
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| /external/mesa3d/src/amd/common/ |
| D | ac_surface.h | 154 unsigned blk_w:4; member
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| D | ac_surface.c | 295 AddrSurfInfoIn->basePitch *= surf->blk_w; in gfx6_compute_level()
505 compressed = surf->blk_w == 4 && surf->blk_h == 4; in gfx6_compute_surface()
1071 compressed = surf->blk_w == 4 && surf->blk_h == 4; in gfx9_compute_surface()
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| /external/libaom/libaom/av1/encoder/ |
| D | encodemb.c | 288 int blk_w = block_size_wide[bsize]; in encode_block() local
293 plane, pixel_c, pixel_r, blk_w, blk_h, in encode_block()
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| D | encoder.c | 3488 const int blk_w = 16; in set_screen_content_options() local
3500 for (int c = 0; c + blk_w <= width; c += blk_w) { in set_screen_content_options()
3504 use_hbd ? av1_count_colors_highbd(this_src, stride, blk_w, blk_h, bd, in set_screen_content_options()
3506 : av1_count_colors(this_src, stride, blk_w, blk_h, count_buf); in set_screen_content_options()
3523 counts_1 * blk_h * blk_w * 10 > width * height; in set_screen_content_options()
3527 counts_2 * blk_h * blk_w * 15 > width * height; in set_screen_content_options()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | r600_texture.c | 200 box->x / rtex->surface.blk_w) * rtex->surface.bpe; in r600_texture_get_offset()
216 box->x / rtex->surface.blk_w) * rtex->surface.bpe; in r600_texture_get_offset()
627 0, 0, rtex->surface.blk_w, false, desc); in si_query_opaque_metadata()
1054 rtex->resource.b.b.depth0, rtex->surface.blk_w, in si_print_texture_info()
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| D | radeon_uvd.c | 1577 msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * luma->blk_w; in si_uvd_set_dt_surfaces()
1619 msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * luma->blk_w; in si_uvd_set_dt_surfaces()
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| D | radeon_vcn_dec.c | 661 decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.blk_w; in rvcn_dec_message_decode()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_texture.c | 193 box->x / rtex->surface.blk_w) * rtex->surface.bpe; in r600_texture_get_offset()
814 rtex->resource.b.b.depth0, rtex->surface.blk_w, in r600_print_texture_info()
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| D | radeon_uvd.c | 1452 msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * luma->blk_w; in ruvd_set_dt_surfaces()
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| /external/libaom/libaom/av1/decoder/ |
| D | decodeframe.c | 267 int blk_w = block_size_wide[bsize]; in inverse_transform_inter_block() local
272 plane, pixel_c, pixel_r, blk_w, blk_h, in inverse_transform_inter_block()
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