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Searched refs:blsr (Results 1 – 13 of 13) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/SkylakeServer/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/SkylakeClient/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/Broadwell/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/Haswell/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/Generic/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/Znver1/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/BtVer2/
Dresources-bmi1.s28 blsr %eax, %ecx label
29 blsr (%rax), %ecx label
31 blsr %rax, %rcx label
32 blsr (%rax), %rcx label
/external/v8/src/ia32/
Dassembler-ia32.h1529 void blsr(Register dst, Register src) { blsr(dst, Operand(src)); } in blsr() function
1530 void blsr(Register dst, Operand src) { bmi1(0xf3, ecx, dst, src); } in blsr() function
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dbmi.ll632 ; The add here used to get shrunk, but the and did not thus hiding the blsr pattern.
/external/llvm/lib/Target/X86/
DX86InstrInfo.td2220 defm BLSR32 : bmi_bls<"blsr{l}", MRM1r, MRM1m, GR32, i32mem>;
2221 defm BLSR64 : bmi_bls<"blsr{q}", MRM1r, MRM1m, GR64, i64mem>, VEX_W;
/external/epid-sdk/ext/ipp/sources/include/
Dia_32e.inc2002 blsr macro x:req, z:req
2003 %ECHO @CatStr(<blsr >, < x,>, < z >)
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrInfo.td2380 defm BLSR32 : bmi_bls<"blsr{l}", MRM1r, MRM1m, GR32, i32mem>;
2381 defm BLSR64 : bmi_bls<"blsr{q}", MRM1r, MRM1m, GR64, i64mem>, VEX_W;
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenAsmMatcher.inc6529 "lsiq\006blsmsk\007blsmskl\007blsmskq\004blsr\005blsrl\005blsrq\005bndcl"
21637 { 514 /* blsr */, X86::BLSR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21638 { 514 /* blsr */, X86::BLSR32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21639 { 514 /* blsr */, X86::BLSR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21640 { 514 /* blsr */, X86::BLSR64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },