/external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
D | valid-xfail-mips32r6.txt | 6 0x20 0x40 0x00 0x01 # CHECK: bovc $0, $2, 4 7 0x20 0x82 0x00 0x01 # CHECK: bovc $2, $4, 4
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D | valid-mips32r6-el.txt | 55 0x01 0x00 0x00 0x20 # CHECK: bovc $zero, $zero, 8 56 0x01 0x00 0x40 0x20 # CHECK: bovc $2, $zero, 8 57 0x01 0x00 0x82 0x20 # CHECK: bovc $4, $2, 8
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D | valid-mips32r6.txt | 54 0x20 0x00 0x00 0x01 # CHECK: bovc $zero, $zero, 8 57 0x20 0x40 0x00 0x01 # CHECK: bovc $2, $zero, 8 58 0x20 0x82 0x00 0x01 # CHECK: bovc $4, $2, 8
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r6/ |
D | valid-xfail-mips32r6.txt | 6 0x20 0x40 0x00 0x01 # CHECK: bovc $0, $2, 4 7 0x20 0x82 0x00 0x01 # CHECK: bovc $2, $4, 4
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D | valid-mips32r6-el.txt | 56 0x01 0x00 0x00 0x20 # CHECK: bovc $zero, $zero, 8 57 0x01 0x00 0x40 0x20 # CHECK: bovc $2, $zero, 8 58 0x01 0x00 0x82 0x20 # CHECK: bovc $4, $2, 8
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D | valid-mips32r6.txt | 56 0x20 0x00 0x00 0x01 # CHECK: bovc $zero, $zero, 8 59 0x20 0x40 0x00 0x01 # CHECK: bovc $2, $zero, 8 60 0x20 0x82 0x00 0x01 # CHECK: bovc $4, $2, 8
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/external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
D | valid-xfail-mips64r6.txt | 6 0x20 0x40 0x00 0x01 # CHECK: bovc $0, $2, 8 7 0x20 0x82 0x00 0x01 # CHECK: bovc $2, $4, 8
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D | valid-mips64r6-el.txt | 57 0x01 0x00 0x40 0x20 # CHECK: bovc $2, $zero, 8 58 0x01 0x00 0x82 0x20 # CHECK: bovc $4, $2, 8 59 0x01 0x00 0x00 0x20 # CHECK: bovc $zero, $zero, 8
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D | valid-mips64r6.txt | 71 0x20 0x00 0x00 0x01 # CHECK: bovc $zero, $zero, 8 74 0x20 0x40 0x00 0x01 # CHECK: bovc $2, $zero, 8 75 0x20 0x82 0x00 0x01 # CHECK: bovc $4, $2, 8
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r6/ |
D | valid-xfail-mips64r6.txt | 6 0x20 0x40 0x00 0x01 # CHECK: bovc $0, $2, 8 7 0x20 0x82 0x00 0x01 # CHECK: bovc $2, $4, 8
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D | valid-mips64r6-el.txt | 57 0x01 0x00 0x40 0x20 # CHECK: bovc $2, $zero, 8 58 0x01 0x00 0x82 0x20 # CHECK: bovc $4, $2, 8 59 0x01 0x00 0x00 0x20 # CHECK: bovc $zero, $zero, 8
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D | valid-mips64r6.txt | 73 0x20 0x00 0x00 0x01 # CHECK: bovc $zero, $zero, 8 76 0x20 0x40 0x00 0x01 # CHECK: bovc $2, $zero, 8 77 0x20 0x82 0x00 0x01 # CHECK: bovc $4, $2, 8
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/external/llvm/test/MC/Mips/micromips32r6/ |
D | valid.s | 346 bovc $2, $4, 24 # CHECK: bovc $2, $4, 24 # encoding: [0x74,0x44,0x00,0x0c] 347 bovc $4, $2, 24 # CHECK: bovc $4, $2, 24 # encoding: [0x74,0x44,0x00,0x0c]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips32r6/ |
D | valid.s | 397 bovc $2, $4, 24 # CHECK: bovc $2, $4, 24 # encoding: [0x74,0x44,0x00,0x0c] 398 bovc $4, $2, 24 # CHECK: bovc $4, $2, 24 # encoding: [0x74,0x44,0x00,0x0c]
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/external/v8/src/mips/ |
D | assembler-mips.h | 801 void bovc(Register rs, Register rt, int16_t offset); 802 inline void bovc(Register rs, Register rt, Label* L) { in bovc() function 803 bovc(rs, rt, shifted_branch_offset(L)); in bovc()
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D | macro-assembler-mips.cc | 965 bovc(rs, rt, L); in Bovc() 972 bovc(rs, rt, &skip); in Bnvc()
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D | assembler-mips.cc | 1723 void Assembler::bovc(Register rs, Register rt, int16_t offset) { in bovc() function in v8::internal::Assembler
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/external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
D | valid.txt | 322 0x74 0x44 0x00 0x0c # CHECK: bovc $2, $4, 24
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
D | valid.txt | 330 0x74 0x44 0x00 0x0c # CHECK: bovc $2, $4, 28
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/external/v8/src/mips64/ |
D | assembler-mips64.h | 811 void bovc(Register rs, Register rt, int16_t offset); 812 inline void bovc(Register rs, Register rt, Label* L) { in bovc() function 813 bovc(rs, rt, shifted_branch_offset(L)); in bovc()
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D | macro-assembler-mips64.cc | 1108 bovc(rs, rt, L); in Bovc() 1115 bovc(rs, rt, &skip); in Bnvc()
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/external/llvm/lib/Target/Mips/ |
D | MicroMips32r6InstrInfo.td | 203 class BOVC_MMR6_ENC : POP35_BOVC_FM_MMR6<"bovc">; 1319 class BOVC_MMR6_DESC : BOVC_BNVC_MMR6_DESC_BASE<"bovc", brtargetr6, GPR32Opnd>;
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D | Mips32r6InstrInfo.td | 434 class BOVC_DESC : CMP_BC_DESC_BASE<"bovc", brtarget, GPR32Opnd>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MicroMips32r6InstrInfo.td | 204 class BOVC_MMR6_ENC : POP35_BOVC_FM_MMR6<"bovc">; 1315 class BOVC_MMR6_DESC : BOVC_BNVC_MMR6_DESC_BASE<"bovc", brtargetr6, GPR32Opnd>;
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D | Mips32r6InstrInfo.td | 474 class BOVC_DESC : CMP_BC_DESC_BASE<"bovc", brtarget, GPR32Opnd>;
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