/external/mesa3d/src/intel/compiler/ |
D | brw_clip_tri.c | 143 vec1(brw_null_reg()), in brw_clip_tri_init_vertices() 181 vec1(brw_null_reg()), in brw_clip_tri_flat_shade() 195 vec1(brw_null_reg()), in brw_clip_tri_flat_shade() 234 brw_AND(p, vec1(brw_null_reg()), c->reg.vertex_src_mask, brw_imm_ud(1)); in load_clip_distance() 249 brw_CMP(p, brw_null_reg(), cond, vec1(dst), brw_imm_f(0.0f)); in load_clip_distance() 290 brw_AND(p, vec1(brw_null_reg()), c->reg.planemask, brw_imm_ud(1)); in brw_clip_tri() 332 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ, get_addr_reg(vtxOut), brw_imm_uw(0) ); in brw_clip_tri() 374 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ, get_addr_reg(vtxOut), brw_imm_uw(0) ); in brw_clip_tri() 428 vec1(brw_null_reg()), in brw_clip_tri() 507 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, c->reg.planemask, brw_imm_ud(0)); in maybe_do_clip_tri() [all …]
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D | brw_clip_unfilled.c | 82 brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, BRW_SWIZZLE_YZXW), in compute_tri_direction() 106 vec1(brw_null_reg()), in cull_direction() 143 vec1(brw_null_reg()), in copy_bfc() 204 vec1(brw_null_reg()), in compute_offset() 217 vec1(brw_null_reg()), in compute_offset() 233 vec1(brw_null_reg()), in merge_edgeflags() 243 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<8)); in merge_edgeflags() 251 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<9)); in merge_edgeflags() 327 vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, in emit_lines() 370 vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, in emit_points() [all …]
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D | brw_clip_line.c | 129 struct brw_reg v1_null_ud = retype(vec1(brw_null_reg()), BRW_REGISTER_TYPE_UD); in clip_and_emit_line() 150 brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2), in clip_and_emit_line() 199 brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, vec1(c->reg.dp1), brw_imm_f(0.0f)); in clip_and_emit_line() 208 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_LE, c->reg.dp0, brw_imm_f(0.0)); in clip_and_emit_line() 220 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t1 ); in clip_and_emit_line() 234 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.dp0, brw_imm_f(0.0)); in clip_and_emit_line() 243 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t0 ); in clip_and_emit_line() 274 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.t, brw_imm_f(1.0)); in clip_and_emit_line()
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D | brw_eu_emit.c | 1290 brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); in brw_IF() 1291 brw_set_src1(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); in brw_IF() 1293 brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); in brw_IF() 1294 brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); in brw_IF() 1299 brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); in brw_IF() 1491 brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); in brw_ELSE() 1492 brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); in brw_ELSE() 1494 brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); in brw_ELSE() 1495 brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); in brw_ELSE() 1500 brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); in brw_ELSE() [all …]
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D | brw_clip_util.c | 167 brw_MUL(p, vec4(brw_null_reg()), deref_4f(v1_ptr, delta), t0); in brw_clip_interp_vertex() 216 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ, in brw_clip_interp_vertex() 276 vec4(brw_null_reg()), in brw_clip_interp_vertex() 342 allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD), in brw_clip_emit_vue() 363 retype(brw_null_reg(), BRW_REGISTER_TYPE_UD), in brw_clip_kill_thread() 444 brw_AND(p, brw_null_reg(), c->reg.ff_sync, brw_imm_ud(0x1)); in brw_clip_ff_sync()
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D | brw_compile_sf.c | 166 brw_CMP(p, vec4(brw_null_reg()), backface_conditional, c->det, brw_imm_f(0)); in do_twoside_color() 492 brw_MUL(p, brw_null_reg(), c->a1_sub_a0, c->dy2); in brw_emit_tri_setup() 498 brw_MUL(p, brw_null_reg(), c->a2_sub_a0, c->dx0); in brw_emit_tri_setup() 513 brw_null_reg(), in brw_emit_tri_setup() 587 brw_null_reg(), in brw_emit_line_setup() 677 brw_null_reg(), in brw_emit_point_sprite_setup() 738 brw_null_reg(), in brw_emit_point_setup() 760 struct brw_reg v1_null_ud = vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD)); in brw_emit_anyprim_setup()
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D | brw_vec4.h | 78 return dst_reg(brw_null_reg()); in dst_null_f() 83 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_DF)); in dst_null_df() 88 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); in dst_null_d() 93 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD)); in dst_null_ud()
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D | brw_fs_builder.h | 204 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_F)); in null_reg_f() 210 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_DF)); in null_reg_df() 219 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); in null_reg_d() 228 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD)); in null_reg_ud()
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D | brw_vec4_generator.cpp | 349 brw_null_reg(), /* dest */ in generate_vs_urb_write() 364 brw_null_reg(), /* dest */ in generate_gs_urb_write() 404 brw_null_reg(), /* dest */ in generate_gs_thread_end() 510 final_write ? src1 : brw_null_reg(), /* dest == src1 */ in generate_gs_svb_write() 778 brw_set_dest(p, send, brw_null_reg()); in generate_tcs_urb_write() 990 brw_set_dest(p, send, brw_null_reg()); in generate_tcs_release_input() 1018 brw_null_reg(), /* dest */ in generate_tcs_thread_end() 1740 brw_null_reg()); in generate_code() 1742 generate_math_gen6(p, inst, dst, src[0], brw_null_reg()); in generate_code() 2126 brw_MOV(p, brw_null_reg(), stride(src[0], 0, 1, 0)); in generate_code()
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D | brw_fs_dead_code_eliminate.cpp | 100 inst->dst = fs_reg(retype(brw_null_reg(), inst->dst.type)); in dead_code_eliminate()
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D | brw_fs_generator.cpp | 153 brw_reg = brw_null_reg(); in brw_reg_from_fs_reg() 383 implied_header = brw_null_reg(); in generate_fb_write() 390 implied_header = brw_null_reg(); in generate_fb_write() 399 struct brw_reg v1_null_ud = vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD)); in generate_fb_write() 589 brw_set_dest(p, insn, brw_null_reg()); in generate_urb_write() 618 brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_UW)); in generate_cs_terminate() 681 brw_LINE(p, brw_null_reg(), interp, delta_x); in generate_linterp() 1911 src[0], brw_null_reg()); in generate_code()
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D | brw_vec4_dead_code_eliminate.cpp | 91 inst->dst = dst_reg(retype(brw_null_reg(), inst->dst.type)); in dead_code_eliminate()
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D | brw_reg.h | 760 brw_null_reg(void) in brw_null_reg() function
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D | brw_vec4.cpp | 2016 reg = brw_null_reg(); in convert_to_hw_regs() 2081 reg = brw_null_reg(); in convert_to_hw_regs()
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D | test_eu_validate.cpp | 137 #define null brw_null_reg()
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
D | brw_ff_gs_emit.c | 197 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD), in brw_ff_gs_emit_vue() 362 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_LE, in gen6_sol_program() 396 brw_CMP(p, vec8(brw_null_reg()), BRW_CONDITIONAL_EQ, in gen6_sol_program() 453 final_write ? c->reg.temp : brw_null_reg(), /* dest */ in gen6_sol_program() 502 brw_AND(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UD), in gen6_sol_program() 518 brw_AND(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UD), in gen6_sol_program()
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