| /external/swiftshader/third_party/llvm-7.0/llvm/lib/FuzzMutate/ |
| D | Operations.cpp | 172 auto buildGEP = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in gepDescriptor() local
180 return {Weight, {sizedPtrType(), anyIntType()}, buildGEP}; in gepDescriptor()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64LegalizerInfo.cpp | 431 MIRBuilder.buildGEP(ListTmp, List, AlignMinus1->getOperand(0).getReg()); in legalizeVaArg()
448 MIRBuilder.buildGEP(NewList, DstPtr, SizeReg); in legalizeVaArg()
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| D | AArch64CallLowering.cpp | 143 MIRBuilder.buildGEP(AddrReg, SPReg, OffsetReg); in getStackAddress()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 63 MIRBuilder.buildGEP(DstReg, KernArgSegmentVReg, OffsetReg); in lowerParameterPtr()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | IRTranslator.cpp | 616 MIRBuilder.buildGEP(NewBaseReg, BaseReg, OffsetReg); in translateGetElementPtr()
642 MIRBuilder.buildGEP(NewBaseReg, BaseReg, GepOffsetReg); in translateGetElementPtr()
649 MIRBuilder.buildGEP(getOrCreateVReg(U), BaseReg, OffsetReg); in translateGetElementPtr()
1204 MIRBuilder.buildGEP(AllocTmp, SPTmp, AllocSize); in translateAlloca()
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| D | MachineIRBuilder.cpp | 181 MachineInstrBuilder MachineIRBuilderBase::buildGEP(unsigned Res, unsigned Op0, in buildGEP() function in MachineIRBuilderBase
208 return buildGEP(Res, Op0, TmpReg); in materializeGEP()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86CallLowering.cpp | 120 MIRBuilder.buildGEP(AddrReg, SPReg, OffsetReg); in getStackAddress()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsCallLowering.cpp | 163 MIRBuilder.buildGEP(AddrReg, SPReg, OffsetReg); in getStackAddress()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 246 MachineInstrBuilder buildGEP(unsigned Res, unsigned Op0,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.cpp | 108 MIRBuilder.buildGEP(AddrReg, SPReg, OffsetReg); in getStackAddress()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | SROA.cpp | 1312 static Value *buildGEP(IRBuilderTy &IRB, Value *BasePtr, in buildGEP() function
1340 return buildGEP(IRB, BasePtr, Indices, NamePrefix); in getNaturalGEPWithType()
1372 return buildGEP(IRB, BasePtr, Indices, NamePrefix); in getNaturalGEPWithType()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
| D | SROA.cpp | 1373 static Value *buildGEP(IRBuilderTy &IRB, Value *BasePtr, in buildGEP() function
1401 return buildGEP(IRB, BasePtr, Indices, NamePrefix); in getNaturalGEPWithType()
1433 return buildGEP(IRB, BasePtr, Indices, NamePrefix); in getNaturalGEPWithType()
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