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/external/tcpdump/tests/
Dipv6-bad-version.out1 IP6 :: > ff02::1:ff76:6c14: ICMP6, neighbor solicitation, who has fe80::20c:29ff:fe76:6c14, length …
3 IP6 :: > ff02::1:ff76:6c14: ICMP6, neighbor solicitation, who has 1111:2222:3333:4444:20c:29ff:fe76…
/external/u-boot/arch/arm/include/asm/arch-armv7/
Dgenerictimer.h35 mcr p15, 0, \reg, c14, c2, 0
38 mcr p15, 0, \reg, c14, c2, 1
40 mrc p15, 0, \reg, c14, c2, 1
44 mcr p15, 0, \reg, c14, c2, 1
/external/u-boot/arch/arm/mach-mvebu/
Dlowlevel_spl.S47 mcr p15, 0, r0, c7, c14, 1 /* @ clean & invalidate D line */
65 mcr p15, 0, r0, c7, c14, 1 /* @ clean & invalidate D line */
/external/u-boot/arch/arm/mach-tegra/
Dpsci.S57 mrceq p15, 0, r7, c14, c0, 0 @ read CNTFRQ from CPU0
61 mcrne p15, 0, r7, c14, c0, 0 @ write CNTFRQ to CPU1..3
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/SystemZ/
Dregs-good.s128 #CHECK: lctl %c14, %c15, 0 # encoding: [0xb7,0xef,0x00,0x00]
137 lctl %c14,%c15,0
202 #CHECK: .cfi_offset %c14, 430
268 .cfi_offset %c14,430
/external/u-boot/arch/arm/cpu/armv7/
Dnonsec_virt.S94 mcrrne p15, 4, r4, r4, c14 @ Reset CNTVOFF to zero
195 mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ
Dcache_v7_asm.S58 mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
Dpsci.S221 mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dpr3502.ll13 tail call void asm sideeffect "mcr p15,0,$0,c7,c14,0", "r,~{memory}"(i32 0) nounwind
/external/llvm/test/CodeGen/ARM/
Dpr3502.ll13 tail call void asm sideeffect "mcr p15,0,$0,c7,c14,0", "r,~{memory}"(i32 0) nounwind
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dpr3502.ll13 tail call void asm sideeffect "mcr p15,0,$0,c7,c14,0", "r,~{memory}"(i32 0) nounwind
/external/deqp-deps/glslang/Test/
DstringToDouble.vert70 double c14 = 00010230000.0045600000e-5;
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dra-allocatable.ll77 @c14 = external global i32*
234 %89 = load i32*, i32** @c14, align 4
/external/llvm/test/CodeGen/Mips/
Dra-allocatable.ll77 @c14 = external global i32*
234 %89 = load i32*, i32** @c14, align 4
/external/clang/test/Misc/
Ddiag-template-diffing.cpp432 template<typename T> using c14 = b14; typedef
433 int f14(c14<int>);
/external/libmtp/logs/
Dmtp-detect-iriver-t30.txt55 0220: 240d 1f4c 2406 5c14 240d 1f54 2406 60c4 $..L$.\.$..T$.`.
120 0220: 240d 1f4c 2406 5c14 240d 1f54 2406 60c4 $..L$.\.$..T$.`.
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs301 0x04,0xe6,0xfa,0xec = ldcl p6, c14, [r10], #16
313 0x04,0xe6,0xfa,0x0c = ldcleq p6, c14, [r10], #16
786 0x04,0xe6,0xea,0xec = stcl p6, c14, [r10], #16
798 0x04,0xe6,0xea,0x0c = stcleq p6, c14, [r10], #16
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s671 ldcl p6, c14, [r10], #16
684 ldcleq p6, c14, [r10], #16
712 @ CHECK: ldcl p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xfa,0xec]
725 @ CHECK: ldcleq p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xfa,0x0c]
1955 stcl p6, c14, [r10], #16
1968 stcleq p6, c14, [r10], #16
1996 @ CHECK: stcl p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xea,0xec]
2009 @ CHECK: stcleq p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xea,0x0c]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/
Darith-fp.ll992 %c14 = fadd float %a14, %b14
1008 %r14 = insertelement <16 x float> %r13, float %c14, i32 14
1096 %c14 = fsub float %a14, %b14
1112 %r14 = insertelement <16 x float> %r13, float %c14, i32 14
1200 %c14 = fmul float %a14, %b14
1216 %r14 = insertelement <16 x float> %r13, float %c14, i32 14
1304 %c14 = fdiv float %a14, %b14
1320 %r14 = insertelement <16 x float> %r13, float %c14, i32 14
/external/deqp-deps/glslang/Test/baseResults/
DstringToDouble.vert.out320 0:70 'c14' ( temp double)
844 0:70 'c14' ( temp double)
/external/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.td161 def UPCL : Rc<14, "upcyclelo", ["c14"]>, DwarfRegNum<[81]>;
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s1095 ldcl p6, c14, [r10], #16
1108 ldcleq p6, c14, [r10], #16
1136 @ CHECK: ldcl p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xfa,0xec]
1149 @ CHECK: ldcleq p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xfa,0x0c]
2771 stcl p6, c14, [r10], #16
2784 stcleq p6, c14, [r10], #16
2812 @ CHECK: stcl p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xea,0xec]
2825 @ CHECK: stcleq p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xea,0x0c]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dbasic-arm-instructions.s1097 ldcl p6, c14, [r10], #16
1110 ldcleq p6, c14, [r10], #16
1138 @ CHECK: ldcl p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xfa,0xec]
1151 @ CHECK: ldcleq p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xfa,0x0c]
2773 stcl p6, c14, [r10], #16
2786 stcleq p6, c14, [r10], #16
2814 @ CHECK: stcl p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xea,0xec]
2827 @ CHECK: stcleq p6, c14, [r10], #16 @ encoding: [0x04,0xe6,0xea,0x0c]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.td156 def UPCYCLELO: Rc<14, "upcyclelo", ["c14"]>, DwarfRegNum<[81]>;
/external/elfutils/tests/
Drun-allregs.sh2268 46: %c14 (c14), unsigned 32 bits
2341 46: %c14 (c14), unsigned 64 bits

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