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Searched refs:can_do_pipelined_register_writes (Results 1 – 5 of 5) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_extensions.c142 else if (devinfo->is_haswell && can_do_pipelined_register_writes(brw->screen)) in intelInitExtensions()
144 else if (devinfo->gen >= 7 && can_do_pipelined_register_writes(brw->screen)) in intelInitExtensions()
237 if (can_do_pipelined_register_writes(brw->screen)) { in intelInitExtensions()
Dgen7_l3_state.c238 if (dw > dw_threshold && can_do_pipelined_register_writes(brw->screen)) { in emit_l3_state()
308 can_do_pipelined_register_writes(brw->screen)) { in gen7_restore_default_l3_config()
Dintel_screen.h143 can_do_pipelined_register_writes(const struct intel_screen *screen) in can_do_pipelined_register_writes() function
Dgen7_sol_state.c52 if (!can_do_pipelined_register_writes(brw->screen)) { in gen7_begin_transform_feedback()
Dintel_screen.c2253 if (can_do_pipelined_register_writes(screen)) { in set_max_gl_versions()