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Searched refs:caslat (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/powerpc/cpu/mpc83xx/
Dspd_sdram.c134 unsigned char caslat, caslat_ctrl; in spd_sdram() local
305 caslat = __ilog2(spd.cas_lat); in spd_sdram()
307 && (caslat > 6)) { in spd_sdram()
311 && (caslat < 2 || caslat > 5)) { in spd_sdram()
316 debug("DDR: caslat SPD bit is %d\n", caslat); in spd_sdram()
329 caslat = 3; in spd_sdram()
331 caslat = 4; in spd_sdram()
344 caslat = caslat; in spd_sdram()
349 caslat = caslat - 1; in spd_sdram()
351 caslat = caslat; in spd_sdram()
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/external/u-boot/drivers/ddr/fsl/
Dctrl_regs.c1373 unsigned int caslat = 4;/* CAS# latency, default set as 6 cycles */ in set_ddr_sdram_mode() local
1436 caslat = cas_latency_table[cas_latency - 9]; in set_ddr_sdram_mode()
1464 | (((caslat >> 1) & 0x7) << 4) in set_ddr_sdram_mode()
1466 | ((caslat & 1) << 2) in set_ddr_sdram_mode()
1545 unsigned int caslat = 4;/* CAS# latency, default set as 6 cycles */ in set_ddr_sdram_mode() local
1625 caslat = cas_latency_table[cas_latency - 5]; in set_ddr_sdram_mode()
1655 | (((caslat >> 1) & 0x7) << 4) in set_ddr_sdram_mode()
1657 | ((caslat & 1) << 2) in set_ddr_sdram_mode()
1753 unsigned int caslat = 0;/* CAS# latency */ in set_ddr_sdram_mode() local
1800 caslat = mode_caslat_table[cas_latency - 1]; in set_ddr_sdram_mode()
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