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Searched refs:cellspu (Results 1 – 25 of 56) sorted by relevance

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/external/swiftshader/third_party/LLVM/test/CodeGen/CellSPU/
Dcall.ll1 ; RUN: llc < %s -march=cellspu -regalloc=linearscan > %t1.s
5 ; RUN: llc < %s -march=cellspu | FileCheck %s
Dcall_indirect.ll1 ; RUN: llc < %s -march=cellspu -asm-verbose=0 -regalloc=linearscan > %t1.s
2 ; RUN: llc < %s -march=cellspu -mattr=large_mem -asm-verbose=0 -regalloc=linearscan > %t2.s
Dfcmp64.ll1 ; RUN: llc < %s -march=cellspu > %t1.s
Dcrash.ll1 ; RUN: llc %s -march=cellspu -o -
Dbss.ll1 ; RUN: llc < %s -march=cellspu | FileCheck %s
Dstorestruct.ll1 ; RUN: llc < %s -march=cellspu | FileCheck %s
Dprivate.ll3 ; RUN: llc < %s -march=cellspu > %t
Ddiv_ops.ll1 ; RUN: llc --march=cellspu %s -o - | FileCheck %s
Dbigstack.ll1 ; RUN: llc < %s -march=cellspu -o %t1.s
Djumptable.ll1 ;RUN: llc --march=cellspu -disable-cgp-branch-opts %s -o - | FileCheck %s
Di8ops.ll1 ; RUN: llc < %s -march=cellspu > %t1.s
Dmul-with-overflow.ll1 ; RUN: llc < %s -march=cellspu
Dsub_ops.ll1 ; RUN: llc < %s -march=cellspu | FileCheck %s
Dfdiv.ll1 ; RUN: llc < %s -march=cellspu > %t1.s
Dvec_const.ll1 ; RUN: llc < %s -march=cellspu > %t1.s
2 ; RUN: llc < %s -march=cellspu -mattr=large_mem > %t2.s
Dfcmp32.ll1 ; RUN: llc --march=cellspu %s -o - | FileCheck %s
Dimmed16.ll1 ; RUN: llc < %s -march=cellspu > %t1.s
D2009-01-01-BrCond.ll1 ; RUN: llc < %s -march=cellspu -o - | grep brnz
Dctpop.ll1 ; RUN: llc < %s -march=cellspu > %t1.s
Darg_ret.ll2 ;RUN: llc --march=cellspu %s -o - | FileCheck %s
Dfneg-fabs.ll1 ; RUN: llc < %s -march=cellspu > %t1.s
Dint2fp.ll1 ; RUN: llc < %s -march=cellspu > %t1.s
Dstruct_1.ll1 ; RUN: llc < %s -march=cellspu > %t1.s
2 ; RUN: llc < %s -march=cellspu -mattr=large_mem > %t2.s
/external/swiftshader/third_party/LLVM/lib/Support/
DTriple.cpp24 case cellspu: return "cellspu"; in getArchTypeName()
62 case cellspu: return "spu"; in getArchTypePrefix()
145 return cellspu; in getArchTypeForLLVMName()
302 return cellspu; in ParseArch()
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/TargetInfo/
DCellSPUTargetInfo.cpp18 RegisterTarget<Triple::cellspu> in LLVMInitializeCellSPUTargetInfo()

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