/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/msa/ |
D | test_ctrlregs.s | 3 #CHECK: cfcmsa $1, $0 # encoding: [0x78,0x7e,0x00,0x59] 4 #CHECK: cfcmsa $1, $0 # encoding: [0x78,0x7e,0x00,0x59] 5 #CHECK: cfcmsa $2, $1 # encoding: [0x78,0x7e,0x08,0x99] 6 #CHECK: cfcmsa $2, $1 # encoding: [0x78,0x7e,0x08,0x99] 7 #CHECK: cfcmsa $3, $2 # encoding: [0x78,0x7e,0x10,0xd9] 8 #CHECK: cfcmsa $3, $2 # encoding: [0x78,0x7e,0x10,0xd9] 9 #CHECK: cfcmsa $4, $3 # encoding: [0x78,0x7e,0x19,0x19] 10 #CHECK: cfcmsa $4, $3 # encoding: [0x78,0x7e,0x19,0x19] 11 #CHECK: cfcmsa $5, $4 # encoding: [0x78,0x7e,0x21,0x59] 12 #CHECK: cfcmsa $5, $4 # encoding: [0x78,0x7e,0x21,0x59] [all …]
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/external/llvm/test/MC/Mips/msa/ |
D | test_ctrlregs.s | 3 #CHECK: cfcmsa $1, $0 # encoding: [0x78,0x7e,0x00,0x59] 4 #CHECK: cfcmsa $1, $0 # encoding: [0x78,0x7e,0x00,0x59] 5 #CHECK: cfcmsa $2, $1 # encoding: [0x78,0x7e,0x08,0x99] 6 #CHECK: cfcmsa $2, $1 # encoding: [0x78,0x7e,0x08,0x99] 7 #CHECK: cfcmsa $3, $2 # encoding: [0x78,0x7e,0x10,0xd9] 8 #CHECK: cfcmsa $3, $2 # encoding: [0x78,0x7e,0x10,0xd9] 9 #CHECK: cfcmsa $4, $3 # encoding: [0x78,0x7e,0x19,0x19] 10 #CHECK: cfcmsa $4, $3 # encoding: [0x78,0x7e,0x19,0x19] 11 #CHECK: cfcmsa $5, $4 # encoding: [0x78,0x7e,0x21,0x59] 12 #CHECK: cfcmsa $5, $4 # encoding: [0x78,0x7e,0x21,0x59] [all …]
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/external/capstone/suite/MC/Mips/ |
D | test_ctrlregs.s.cs | 2 0x78,0x7e,0x00,0x59 = cfcmsa $1, $0 3 0x78,0x7e,0x00,0x59 = cfcmsa $1, $0 4 0x78,0x7e,0x08,0x99 = cfcmsa $2, $1 5 0x78,0x7e,0x08,0x99 = cfcmsa $2, $1 6 0x78,0x7e,0x10,0xd9 = cfcmsa $3, $2 7 0x78,0x7e,0x10,0xd9 = cfcmsa $3, $2 8 0x78,0x7e,0x19,0x19 = cfcmsa $4, $3 9 0x78,0x7e,0x19,0x19 = cfcmsa $4, $3 10 0x78,0x7e,0x21,0x59 = cfcmsa $5, $4 11 0x78,0x7e,0x21,0x59 = cfcmsa $5, $4 [all …]
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/external/llvm/test/MC/Disassembler/Mips/msa/ |
D | test_ctrlregs.txt | 3 0x78 0x7e 0x00 0x59 # CHECK: cfcmsa $1, $0 4 0x78 0x7e 0x00 0x59 # CHECK: cfcmsa $1, $0 5 0x78 0x7e 0x08 0x99 # CHECK: cfcmsa $2, $1 6 0x78 0x7e 0x08 0x99 # CHECK: cfcmsa $2, $1 7 0x78 0x7e 0x10 0xd9 # CHECK: cfcmsa $3, $2 8 0x78 0x7e 0x10 0xd9 # CHECK: cfcmsa $3, $2 9 0x78 0x7e 0x19 0x19 # CHECK: cfcmsa $4, $3 10 0x78 0x7e 0x19 0x19 # CHECK: cfcmsa $4, $3 11 0x78 0x7e 0x21 0x59 # CHECK: cfcmsa $5, $4 12 0x78 0x7e 0x21 0x59 # CHECK: cfcmsa $5, $4 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/msa/ |
D | test_ctrlregs.txt | 3 0x78 0x7e 0x00 0x59 # CHECK: cfcmsa $1, $0 4 0x78 0x7e 0x00 0x59 # CHECK: cfcmsa $1, $0 5 0x78 0x7e 0x08 0x99 # CHECK: cfcmsa $2, $1 6 0x78 0x7e 0x08 0x99 # CHECK: cfcmsa $2, $1 7 0x78 0x7e 0x10 0xd9 # CHECK: cfcmsa $3, $2 8 0x78 0x7e 0x10 0xd9 # CHECK: cfcmsa $3, $2 9 0x78 0x7e 0x19 0x19 # CHECK: cfcmsa $4, $3 10 0x78 0x7e 0x19 0x19 # CHECK: cfcmsa $4, $3 11 0x78 0x7e 0x21 0x59 # CHECK: cfcmsa $5, $4 12 0x78 0x7e 0x21 0x59 # CHECK: cfcmsa $5, $4 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/msa/ |
D | elm_cxcmsa.ll | 1 ; Test the MSA ctcmsa and cfcmsa intrinsics (which are encoded with the ELM 9 %0 = tail call i32 @llvm.mips.cfcmsa(i32 0) 14 ; CHECK: cfcmsa $[[R1:[0-9]+]], $0 19 %0 = tail call i32 @llvm.mips.cfcmsa(i32 1) 24 ; CHECK: cfcmsa $[[R1:[0-9]+]], $1 29 %0 = tail call i32 @llvm.mips.cfcmsa(i32 2) 34 ; CHECK: cfcmsa $[[R1:[0-9]+]], $2 39 %0 = tail call i32 @llvm.mips.cfcmsa(i32 3) 44 ; CHECK: cfcmsa $[[R1:[0-9]+]], $3 49 %0 = tail call i32 @llvm.mips.cfcmsa(i32 4) [all …]
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/external/llvm/test/CodeGen/Mips/msa/ |
D | elm_cxcmsa.ll | 1 ; Test the MSA ctcmsa and cfcmsa intrinsics (which are encoded with the ELM 9 %0 = tail call i32 @llvm.mips.cfcmsa(i32 0) 14 ; CHECK: cfcmsa $[[R1:[0-9]+]], $0 19 %0 = tail call i32 @llvm.mips.cfcmsa(i32 1) 24 ; CHECK: cfcmsa $[[R1:[0-9]+]], $1 29 %0 = tail call i32 @llvm.mips.cfcmsa(i32 2) 34 ; CHECK: cfcmsa $[[R1:[0-9]+]], $2 39 %0 = tail call i32 @llvm.mips.cfcmsa(i32 3) 44 ; CHECK: cfcmsa $[[R1:[0-9]+]], $3 49 %0 = tail call i32 @llvm.mips.cfcmsa(i32 4) [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsScheduleP5600.td | 296 // bnz.[bhwdv], cfcmsa, ctcmsa
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D | MipsScheduleGeneric.td | 929 // bnz.[bhwdv], cfcmsa, ctcmsa
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D | MipsMSAInstrInfo.td | 1790 string AsmString = "cfcmsa\t$rd, $cs";
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/external/v8/src/mips/ |
D | assembler-mips.h | 1626 void cfcmsa(Register rd, MSAControlRegister cs);
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D | assembler-mips.cc | 3701 void Assembler::cfcmsa(Register rd, MSAControlRegister cs) { in cfcmsa() function in v8::internal::Assembler
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/external/v8/src/mips64/ |
D | assembler-mips64.h | 1701 void cfcmsa(Register rd, MSAControlRegister cs);
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D | assembler-mips64.cc | 4027 void Assembler::cfcmsa(Register rd, MSAControlRegister cs) { in cfcmsa() function in v8::internal::Assembler
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/external/llvm/lib/Target/Mips/ |
D | MipsMSAInstrInfo.td | 1792 string AsmString = "cfcmsa\t$rd, $cs";
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenAsmMatcher.inc | 5703 …{ 2073 /* cfcmsa */, Mips::CFCMSA, Convert__GPR32AsmReg1_0__MSACtrlAsmReg1_1, Feature_HasStdEnc|Fe… 8790 { Feature_HasStdEnc|Feature_HasMSA, 2073 /* cfcmsa */, MCK_GPR32AsmReg, 1 /* 0 */ }, 8791 { Feature_HasStdEnc|Feature_HasMSA, 2073 /* cfcmsa */, MCK_MSACtrlAsmReg, 2 /* 1 */ },
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/external/swiftshader/third_party/llvm-7.0/configs/common/include/llvm/IR/ |
D | IntrinsicEnums.inc | 3086 mips_cfcmsa, // llvm.mips.cfcmsa
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D | IntrinsicImpl.inc | 3112 "llvm.mips.cfcmsa", 11990 3, // llvm.mips.cfcmsa
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/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
D | Intrinsics.gen | 2327 mips_cfcmsa, // llvm.mips.cfcmsa 8385 "llvm.mips.cfcmsa", 16325 3, // llvm.mips.cfcmsa
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/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
D | Intrinsics.gen | 2327 mips_cfcmsa, // llvm.mips.cfcmsa 8385 "llvm.mips.cfcmsa", 16325 3, // llvm.mips.cfcmsa
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/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/ |
D | Intrinsics.gen | 2327 mips_cfcmsa, // llvm.mips.cfcmsa 8385 "llvm.mips.cfcmsa", 16325 3, // llvm.mips.cfcmsa
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/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
D | Intrinsics.gen | 2321 mips_cfcmsa, // llvm.mips.cfcmsa 8345 "llvm.mips.cfcmsa", 16230 3, // llvm.mips.cfcmsa
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/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
D | Intrinsics.gen | 2327 mips_cfcmsa, // llvm.mips.cfcmsa 8385 "llvm.mips.cfcmsa", 16325 3, // llvm.mips.cfcmsa
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