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Searched refs:cfg1 (Results 1 – 25 of 25) sorted by relevance

/external/u-boot/arch/arm/include/asm/mach-imx/
Dboot_mode.h8 #define MAKE_CFGVAL(cfg1, cfg2, cfg3, cfg4) \ argument
9 ((cfg4) << 24) | ((cfg3) << 16) | ((cfg2) << 8) | (cfg1)
/external/u-boot/drivers/net/
Dpic32_eth.c75 writel(EMAC_SOFTRESET, &emac_p->cfg1.set); /* reset assert */ in pic32_mii_init()
77 writel(EMAC_SOFTRESET, &emac_p->cfg1.clr); /* reset deassert */ in pic32_mii_init()
172 writel(v, &emac_p->cfg1.raw); in pic32_mac_init()
219 writel(EMAC_SOFTRESET, &emac_p->cfg1.raw); in pic32_mac_reset()
223 writel(0, &emac_p->cfg1.raw); in pic32_mac_reset()
366 writel(EMAC_SOFTRESET, &emac_p->cfg1.raw); in pic32_eth_stop()
369 writel(0, &emac_p->cfg1.raw); in pic32_eth_stop()
Dpic32_eth.h41 struct pic32_reg_atomic cfg1; /* 0x200*/ member
/external/u-boot/board/freescale/m5208evbe/
Dm5208evbe.c41 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
/external/u-boot/board/freescale/m5329evb/
Dm5329evb.c38 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
/external/u-boot/board/freescale/m5373evb/
Dm5373evb.c38 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
/external/u-boot/board/freescale/m53017evb/
Dm53017evb.c41 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
/external/u-boot/board/freescale/m547xevb/
Dm547xevb.c55 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
/external/u-boot/board/freescale/m548xevb/
Dm548xevb.c55 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
/external/u-boot/drivers/pci/
Dpcie_layerscape.h143 void __iomem *cfg1; member
Dpcie_layerscape.c266 *paddress = pcie->cfg1 + offset; in ls_pcie_conf_address()
518 pcie->cfg1 = pcie->cfg0 + fdt_resource_size(&pcie->cfg_res) / 2; in ls_pcie_probe()
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dtve.h62 u32 cfg1; /* 0x138 */ member
/external/u-boot/arch/arm/mach-sunxi/
Ddram_sunxi_dw.c98 const u32 cfg1 = ((u32)bwl2 << 16) | (bwl1 & 0xffff); in mbus_configure_port() local
100 debug("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1); in mbus_configure_port()
102 writel(cfg1, &mctl_com->mcr[port][1]); in mbus_configure_port()
/external/u-boot/board/astro/mcf5373l/
Dmcf5373l.c50 __raw_writel(0x33211530, &sdp->cfg1); in dram_init()
/external/u-boot/arch/m68k/include/asm/
Dimmap_520x.h168 u32 cfg1; /* 0x08 Cfg 1 */ member
Dimmap_547x_8x.h70 u32 cfg1; /* 0x08 */ member
Dimmap_5301x.h288 u32 cfg1; /* 0x08 Cfg 1 */ member
Dimmap_5329.h366 u32 cfg1; /* 0x08 Configuration register 1 */ member
/external/u-boot/arch/arm/mach-imx/
Dcpu.c102 uint32_t cfg1; member
/external/u-boot/arch/powerpc/include/asm/
Dfsl_liodn.h224 offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg1) + \
Dimmap_85xx.h2740 u32 cfg1; /* cfg register 1 */ member
/external/u-boot/arch/arm/include/asm/arch-mx25/
Dimx-regs.h56 u32 cfg1; /* configuration 1 */ member
/external/u-boot/arch/arm/include/asm/arch-mx31/
Dimx-regs.h524 u32 cfg1; member
/external/u-boot/arch/arm/include/asm/arch-mx7ulp/
Dimx-regs.h992 u32 cfg1; member
/external/u-boot/arch/arm/include/asm/arch-mx7/
Dimx-regs.h958 u32 cfg1; member