/external/wpa_supplicant_8/src/ap/ |
D | acs.c | 249 static void acs_clean_chan_surveys(struct hostapd_channel_data *chan) in acs_clean_chan_surveys() argument 253 if (dl_list_empty(&chan->survey_list)) in acs_clean_chan_surveys() 256 dl_list_for_each_safe(survey, tmp, &chan->survey_list, in acs_clean_chan_surveys() 267 struct hostapd_channel_data *chan; in acs_cleanup() local 270 chan = &iface->current_mode->channels[i]; in acs_cleanup() 272 if (chan->flag & HOSTAPD_CHAN_SURVEY_LIST_INITIALIZED) in acs_cleanup() 273 acs_clean_chan_surveys(chan); in acs_cleanup() 275 dl_list_init(&chan->survey_list); in acs_cleanup() 276 chan->flag |= HOSTAPD_CHAN_SURVEY_LIST_INITIALIZED; in acs_cleanup() 277 chan->min_nf = 0; in acs_cleanup() [all …]
|
D | dfs.c | 54 static int dfs_channel_available(struct hostapd_channel_data *chan, in dfs_channel_available() argument 62 if (skip_radar && (chan->flag & HOSTAPD_CHAN_RADAR) && in dfs_channel_available() 63 ((chan->flag & HOSTAPD_CHAN_DFS_MASK) != in dfs_channel_available() 67 if (chan->flag & HOSTAPD_CHAN_DISABLED) in dfs_channel_available() 69 if ((chan->flag & HOSTAPD_CHAN_RADAR) && in dfs_channel_available() 70 ((chan->flag & HOSTAPD_CHAN_DFS_MASK) == in dfs_channel_available() 77 static int dfs_is_chan_allowed(struct hostapd_channel_data *chan, int n_chans) in dfs_is_chan_allowed() argument 117 if (chan->chan == allowed[i]) in dfs_is_chan_allowed() 143 struct hostapd_channel_data *first_chan, *chan; in dfs_chan_range_available() local 159 chan = dfs_get_chan_data(mode, first_chan->freq + i * 20, in dfs_chan_range_available() [all …]
|
/external/u-boot/drivers/ddr/marvell/axp/ |
D | xor.c | 20 static int mv_xor_cmd_set(u32 chan, int command); 21 static int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl); 140 static int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl) in mv_xor_ctrl_set() argument 145 val = reg_read(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan))) in mv_xor_ctrl_set() 149 reg_write(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)), xor_ctrl); in mv_xor_ctrl_set() 154 int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size, u32 init_val_high, in mv_xor_mem_init() argument 160 if (chan >= MV_XOR_MAX_CHAN) in mv_xor_mem_init() 163 if (MV_ACTIVE == mv_xor_state_get(chan)) in mv_xor_mem_init() 171 tmp = reg_read(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan))); in mv_xor_mem_init() 174 reg_write(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)), tmp); in mv_xor_mem_init() [all …]
|
D | xor_regs.h | 13 #define XOR_UNIT(chan) ((chan) >> 1) argument 14 #define XOR_CHAN(chan) ((chan) & 1) argument 21 #define XOR_CONFIG_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x10 + ((chan) * 4))) argument 22 #define XOR_ACTIVATION_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x20 + ((chan) * 4))) argument 31 #define XOR_NEXT_DESC_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x200 + ((chan) * 4))) argument 32 #define XOR_CURR_DESC_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x210 + ((chan) * 4))) argument 33 #define XOR_BYTE_COUNT_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x220 + ((chan) * 4))) argument 35 #define XOR_DST_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x2B0 + ((chan) * 4))) argument 36 #define XOR_BLOCK_SIZE_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x2C0 + ((chan) * 4))) argument 96 #define XOR_WINDOW_CTRL_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + (0x240 + ((chan) * 4))) argument
|
/external/u-boot/drivers/ddr/marvell/a38x/ |
D | xor.c | 150 int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl) in mv_xor_ctrl_set() argument 155 old_value = reg_read(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan))) & in mv_xor_ctrl_set() 159 reg_write(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)), xor_ctrl); in mv_xor_ctrl_set() 164 int mv_xor_mem_init(u32 chan, u32 start_ptr, unsigned long long block_size, in mv_xor_mem_init() argument 173 if (chan >= MV_XOR_MAX_CHAN) in mv_xor_mem_init() 176 if (MV_ACTIVE == mv_xor_state_get(chan)) in mv_xor_mem_init() 184 temp = reg_read(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan))); in mv_xor_mem_init() 187 reg_write(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)), temp); in mv_xor_mem_init() 193 reg_write(XOR_DST_PTR_REG(XOR_UNIT(chan), XOR_CHAN(chan)), start_ptr); in mv_xor_mem_init() 199 reg_write(XOR_BLOCK_SIZE_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_mem_init() [all …]
|
D | xor_regs.h | 13 #define XOR_UNIT(chan) ((chan) >> 1) argument 14 #define XOR_CHAN(chan) ((chan) & 1) argument 21 #define XOR_CONFIG_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \ argument 22 (0x10 + ((chan) * 4))) 23 #define XOR_ACTIVATION_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \ argument 24 (0x20 + ((chan) * 4))) 33 #define XOR_NEXT_DESC_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \ argument 34 (0x200 + ((chan) * 4))) 35 #define XOR_CURR_DESC_PTR_REG(unit, chan) (MV_XOR_REGS_BASE(unit) + \ argument 36 (0x210 + ((chan) * 4))) [all …]
|
/external/mesa3d/src/gallium/drivers/r300/compiler/ |
D | radeon_dataflow_swizzles.c | 48 for(unsigned int chan = 0; chan < 4; ++chan) { in rewrite_source() local 49 if (GET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan) != RC_SWIZZLE_UNUSED) in rewrite_source() 50 usemask |= 1 << chan; in rewrite_source() 68 for(unsigned int chan = 0; chan < 4; ++chan) { in rewrite_source() local 69 if (!GET_BIT(split.Phase[phase], chan)) in rewrite_source() 70 SET_SWZ(mov->U.I.SrcReg[0].Swizzle, chan, RC_SWIZZLE_UNUSED); in rewrite_source() 72 phase_refmask |= 1 << GET_SWZ(mov->U.I.SrcReg[0].Swizzle, chan); in rewrite_source() 90 for(unsigned int chan = 0; chan < 4; ++chan) { in rewrite_source() local 91 SET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan, in rewrite_source() 92 GET_BIT(usemask, chan) ? chan : RC_SWIZZLE_UNUSED); in rewrite_source() [all …]
|
/external/u-boot/drivers/mailbox/ |
D | mailbox-uclass.c | 16 static int mbox_of_xlate_default(struct mbox_chan *chan, in mbox_of_xlate_default() argument 19 debug("%s(chan=%p)\n", __func__, chan); in mbox_of_xlate_default() 26 chan->id = args->args[0]; in mbox_of_xlate_default() 31 int mbox_get_by_index(struct udevice *dev, int index, struct mbox_chan *chan) in mbox_get_by_index() argument 38 debug("%s(dev=%p, index=%d, chan=%p)\n", __func__, dev, index, chan); in mbox_get_by_index() 56 chan->dev = dev_mbox; in mbox_get_by_index() 58 ret = ops->of_xlate(chan, &args); in mbox_get_by_index() 60 ret = mbox_of_xlate_default(chan, &args); in mbox_get_by_index() 66 ret = ops->request(chan); in mbox_get_by_index() 76 struct mbox_chan *chan) in mbox_get_by_name() argument [all …]
|
D | sandbox-mbox.c | 23 static int sandbox_mbox_request(struct mbox_chan *chan) in sandbox_mbox_request() argument 25 debug("%s(chan=%p)\n", __func__, chan); in sandbox_mbox_request() 27 if (chan->id >= SANDBOX_MBOX_CHANNELS) in sandbox_mbox_request() 33 static int sandbox_mbox_free(struct mbox_chan *chan) in sandbox_mbox_free() argument 35 debug("%s(chan=%p)\n", __func__, chan); in sandbox_mbox_free() 40 static int sandbox_mbox_send(struct mbox_chan *chan, const void *data) in sandbox_mbox_send() argument 42 struct sandbox_mbox *sbm = dev_get_priv(chan->dev); in sandbox_mbox_send() 45 debug("%s(chan=%p, data=%p)\n", __func__, chan, data); in sandbox_mbox_send() 47 sbm->chans[chan->id].rx_msg = *pmsg ^ SANDBOX_MBOX_PING_XOR; in sandbox_mbox_send() 48 sbm->chans[chan->id].rx_msg_valid = true; in sandbox_mbox_send() [all …]
|
D | tegra-hsp.c | 71 static int tegra_hsp_of_xlate(struct mbox_chan *chan, in tegra_hsp_of_xlate() argument 74 debug("%s(chan=%p)\n", __func__, chan); in tegra_hsp_of_xlate() 81 chan->id = (args->args[0] << 16) | args->args[1]; in tegra_hsp_of_xlate() 86 static int tegra_hsp_request(struct mbox_chan *chan) in tegra_hsp_request() argument 90 debug("%s(chan=%p)\n", __func__, chan); in tegra_hsp_request() 92 db_id = tegra_hsp_db_id(chan->id); in tegra_hsp_request() 101 static int tegra_hsp_free(struct mbox_chan *chan) in tegra_hsp_free() argument 103 debug("%s(chan=%p)\n", __func__, chan); in tegra_hsp_free() 108 static int tegra_hsp_send(struct mbox_chan *chan, const void *data) in tegra_hsp_send() argument 110 struct tegra_hsp *thsp = dev_get_priv(chan->dev); in tegra_hsp_send() [all …]
|
/external/mesa3d/src/gallium/auxiliary/gallivm/ |
D | lp_bld_tgsi_info.c | 64 unsigned chan) in analyse_src() argument 68 unsigned swizzle = tgsi_util_get_src_register_swizzle(src, chan); in analyse_src() 111 unsigned chan; in analyse_tex() local 172 for (chan = 0; chan < 4; ++chan) { in analyse_tex() 173 struct lp_tgsi_channel_info *chan_info = &tex_info->coord[chan]; in analyse_tex() 174 if (readmask & (1 << chan)) { in analyse_tex() 175 analyse_src(ctx, chan_info, &inst->Src[0].Register, chan); in analyse_tex() 207 unsigned chan; in analyse_sample() local 257 for (chan = 0; chan < 4; ++chan) { in analyse_sample() 258 struct lp_tgsi_channel_info *chan_info = &tex_info->coord[chan]; in analyse_sample() [all …]
|
D | lp_bld_tgsi_action.c | 96 emit_data->output[emit_data->chan] = LLVMBuildFAdd( in add_emit() 109 emit_data->output[emit_data->chan] = LLVMBuildFPToSI(bld_base->base.gallivm->builder, tmp, in arr_emit() 121 unsigned chan, src; in dp_fetch_args() local 123 for (chan = 0; chan < dp_components; chan++) { in dp_fetch_args() 124 emit_data->args[(src * dp_components) + chan] = in dp_fetch_args() 125 lp_build_emit_fetch(bld_base, emit_data->inst, src, chan); in dp_fetch_args() 153 emit_data->output[emit_data->chan] = lp_build_emit_llvm_binary(bld_base, in dp2_emit() 188 emit_data->output[emit_data->chan] = lp_build_emit_llvm_binary(bld_base, in dp3_emit() 228 emit_data->output[emit_data->chan] = lp_build_emit_llvm_binary(bld_base, in dp4_emit() 338 emit_data->output[emit_data->chan] = in frc_emit() [all …]
|
/external/wpa_supplicant_8/src/common/ |
D | ieee802_11_common.c | 957 static int ieee80211_chan_to_freq_us(u8 op_class, u8 chan) in ieee80211_chan_to_freq_us() argument 963 if (chan < 1 || chan > 11) in ieee80211_chan_to_freq_us() 965 return 2407 + 5 * chan; in ieee80211_chan_to_freq_us() 972 if (chan < 36 || chan > 64) in ieee80211_chan_to_freq_us() 974 return 5000 + 5 * chan; in ieee80211_chan_to_freq_us() 977 if (chan < 100 || chan > 144) in ieee80211_chan_to_freq_us() 979 return 5000 + 5 * chan; in ieee80211_chan_to_freq_us() 985 if (chan < 149 || chan > 161) in ieee80211_chan_to_freq_us() 987 return 5000 + 5 * chan; in ieee80211_chan_to_freq_us() 989 if (chan < 149 || chan > 165) in ieee80211_chan_to_freq_us() [all …]
|
/external/tensorflow/tensorflow/lite/experimental/micro/examples/micro_speech/micro_features/ |
D | filterbank_util.cc | 117 int chan; in FilterbankPopulateState() local 118 for (chan = 0; chan < num_channels_plus_1; ++chan) { in FilterbankPopulateState() 121 while (FreqToMel((freq_index)*hz_per_sbin) <= center_mel_freqs[chan]) { in FilterbankPopulateState() 126 actual_channel_starts[chan] = chan_freq_index_start; in FilterbankPopulateState() 127 actual_channel_widths[chan] = width; in FilterbankPopulateState() 136 state->channel_frequency_starts[chan] = 0; in FilterbankPopulateState() 137 state->channel_weight_starts[chan] = 0; in FilterbankPopulateState() 138 state->channel_widths[chan] = kFilterbankChannelBlockSize; in FilterbankPopulateState() 142 for (j = 0; j < chan; ++j) { in FilterbankPopulateState() 157 state->channel_frequency_starts[chan] = aligned_start; in FilterbankPopulateState() [all …]
|
/external/tensorflow/tensorflow/lite/experimental/microfrontend/lib/ |
D | filterbank_util.c | 114 int chan; in FilterbankPopulateState() local 115 for (chan = 0; chan < num_channels_plus_1; ++chan) { in FilterbankPopulateState() 118 while (FreqToMel((freq_index) * hz_per_sbin) <= center_mel_freqs[chan]) { in FilterbankPopulateState() 123 actual_channel_starts[chan] = chan_freq_index_start; in FilterbankPopulateState() 124 actual_channel_widths[chan] = width; in FilterbankPopulateState() 133 state->channel_frequency_starts[chan] = 0; in FilterbankPopulateState() 134 state->channel_weight_starts[chan] = 0; in FilterbankPopulateState() 135 state->channel_widths[chan] = kFilterbankChannelBlockSize; in FilterbankPopulateState() 139 for (j = 0; j < chan; ++j) { in FilterbankPopulateState() 155 state->channel_frequency_starts[chan] = aligned_start; in FilterbankPopulateState() [all …]
|
/external/mesa3d/src/gallium/drivers/r600/sb/ |
D | sb_bc_finalize.cpp | 321 assert(fdst.chan() == slot || slot == SLOT_TRANS); in finalize_alu_group() 326 n->bc.dst_chan = d ? fdst.chan() : slot < SLOT_TRANS ? slot : 0; in finalize_alu_group() 387 src.chan = sc.chan(); in finalize_alu_src() 407 src.chan = gpr.chan(); in finalize_alu_src() 412 src.chan = v->gpr.chan(); in finalize_alu_src() 418 src.chan = 0; in finalize_alu_src() 432 src.chan = g->literal_chan(lv); in finalize_alu_src() 445 src.chan = k.chan(); in finalize_alu_src() 451 src.chan = 0; in finalize_alu_src() 454 src.chan = 0; in finalize_alu_src() [all …]
|
/external/u-boot/drivers/pwm/ |
D | sandbox_pwm.c | 25 struct sandbox_pwm_chan chan[NUM_CHANNELS]; member 32 struct sandbox_pwm_chan *chan; in sandbox_pwm_set_config() local 36 chan = &priv->chan[channel]; in sandbox_pwm_set_config() 37 chan->period_ns = period_ns; in sandbox_pwm_set_config() 38 chan->duty_ns = duty_ns; in sandbox_pwm_set_config() 47 struct sandbox_pwm_chan *chan; in sandbox_pwm_set_enable() local 51 chan = &priv->chan[channel]; in sandbox_pwm_set_enable() 52 chan->enable = enable; in sandbox_pwm_set_enable() 61 struct sandbox_pwm_chan *chan; in sandbox_pwm_set_invert() local 65 chan = &priv->chan[channel]; in sandbox_pwm_set_invert() [all …]
|
/external/u-boot/drivers/ram/rockchip/ |
D | sdram_rk3399.c | 34 struct chan_info chan[2]; member 111 static void set_memory_map(const struct chan_info *chan, u32 channel, in set_memory_map() argument 116 u32 *denali_ctl = chan->pctl->denali_ctl; in set_memory_map() 117 u32 *denali_pi = chan->pi->denali_pi; in set_memory_map() 155 static void set_ds_odt(const struct chan_info *chan, in set_ds_odt() argument 158 u32 *denali_phy = chan->publ->denali_phy; in set_ds_odt() 294 static int phy_io_config(const struct chan_info *chan, in phy_io_config() argument 297 u32 *denali_phy = chan->publ->denali_phy; in phy_io_config() 455 static int pctl_cfg(const struct chan_info *chan, u32 channel, in pctl_cfg() argument 458 u32 *denali_ctl = chan->pctl->denali_ctl; in pctl_cfg() [all …]
|
D | sdram_rk3188.c | 34 struct chan_info chan[1]; member 255 static void phy_cfg(const struct chan_info *chan, int channel, in phy_cfg() argument 258 struct rk3288_ddr_publ *publ = chan->publ; in phy_cfg() 259 struct rk3188_msch *msch = chan->msch; in phy_cfg() 376 static void set_bandwidth_ratio(const struct chan_info *chan, int channel, in set_bandwidth_ratio() argument 379 struct rk3288_ddr_pctl *pctl = chan->pctl; in set_bandwidth_ratio() 380 struct rk3288_ddr_publ *publ = chan->publ; in set_bandwidth_ratio() 381 struct rk3188_msch *msch = chan->msch; in set_bandwidth_ratio() 414 static int data_training(const struct chan_info *chan, int channel, in data_training() argument 422 struct rk3288_ddr_publ *publ = chan->publ; in data_training() [all …]
|
D | sdram_rk3288.c | 36 struct chan_info chan[2]; member 289 static void phy_cfg(const struct chan_info *chan, int channel, in phy_cfg() argument 292 struct rk3288_ddr_publ *publ = chan->publ; in phy_cfg() 293 struct rk3288_msch *msch = chan->msch; in phy_cfg() 434 static void set_bandwidth_ratio(const struct chan_info *chan, int channel, in set_bandwidth_ratio() argument 437 struct rk3288_ddr_pctl *pctl = chan->pctl; in set_bandwidth_ratio() 438 struct rk3288_ddr_publ *publ = chan->publ; in set_bandwidth_ratio() 439 struct rk3288_msch *msch = chan->msch; in set_bandwidth_ratio() 472 static int data_training(const struct chan_info *chan, int channel, in data_training() argument 480 struct rk3288_ddr_publ *publ = chan->publ; in data_training() [all …]
|
/external/mesa3d/src/gallium/drivers/vc4/ |
D | vc4_nir_lower_io.c | 56 vc4_nir_unpack_8i(nir_builder *b, nir_ssa_def *src, unsigned chan) in vc4_nir_unpack_8i() argument 60 nir_imm_int(b, 8 * chan), in vc4_nir_unpack_8i() 66 vc4_nir_unpack_16i(nir_builder *b, nir_ssa_def *src, unsigned chan) in vc4_nir_unpack_16i() argument 70 nir_imm_int(b, 16 * chan), in vc4_nir_unpack_16i() 76 vc4_nir_unpack_16u(nir_builder *b, nir_ssa_def *src, unsigned chan) in vc4_nir_unpack_16u() argument 78 if (chan == 0) { in vc4_nir_unpack_16u() 86 vc4_nir_unpack_8f(nir_builder *b, nir_ssa_def *src, unsigned chan) in vc4_nir_unpack_8f() argument 88 return nir_channel(b, nir_unpack_unorm_4x8(b, src), chan); in vc4_nir_unpack_8f() 98 const struct util_format_channel_description *chan = in vc4_nir_get_vattr_channel_vpm() local 104 } else if (chan->size == 32 && chan->type == UTIL_FORMAT_TYPE_FLOAT) { in vc4_nir_get_vattr_channel_vpm() [all …]
|
/external/mesa3d/src/gallium/drivers/llvmpipe/ |
D | lp_bld_interp.c | 118 attrib_name(LLVMValueRef val, unsigned attrib, unsigned chan, const char *suffix) in attrib_name() argument 121 lp_build_name(val, "pos.%c%s", "xyzw"[chan], suffix); in attrib_name() 123 lp_build_name(val, "input%u.%c%s", attrib - 1, "xyzw"[chan], suffix); in attrib_name() 269 unsigned chan; in attribs_update_simple() local 271 for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) { in attribs_update_simple() 272 if (mask & (1 << chan)) { in attribs_update_simple() 278 index = lp_build_const_int32(gallivm, chan); in attribs_update_simple() 284 if (attrib == 0 && chan == 0) { in attribs_update_simple() 290 else if (attrib == 0 && chan == 1) { in attribs_update_simple() 333 a = bld->attribs[0][chan]; in attribs_update_simple() [all …]
|
/external/tensorflow/tensorflow/contrib/resampler/kernels/ |
D | resampler_ops.cc | 63 auto get_data_point = [&](const int x, const int y, const int chan) { in operator ()() argument 68 data_channels * (y * data_width + x) + chan] in operator ()() 93 for (int chan = 0; chan < data_channels; ++chan) { in operator ()() local 94 const T img_fxfy = dx * dy * get_data_point(fx, fy, chan); in operator ()() 96 (one - dx) * (one - dy) * get_data_point(cx, cy, chan); in operator ()() 97 const T img_fxcy = dx * (one - dy) * get_data_point(fx, cy, chan); in operator ()() 98 const T img_cxfy = (one - dx) * dy * get_data_point(cx, fy, chan); in operator ()() 99 set_output(sample_id, chan, in operator ()() 103 for (int chan = 0; chan < data_channels; ++chan) { in operator ()() local 104 set_output(sample_id, chan, zero); in operator ()() [all …]
|
/external/mesa3d/src/gallium/auxiliary/tgsi/ |
D | tgsi_exec.c | 981 check_inf_or_nan(const union tgsi_exec_channel *chan) in check_inf_or_nan() argument 983 assert(!util_is_inf_or_nan((chan)->f[0])); in check_inf_or_nan() 984 assert(!util_is_inf_or_nan((chan)->f[1])); in check_inf_or_nan() 985 assert(!util_is_inf_or_nan((chan)->f[2])); in check_inf_or_nan() 986 assert(!util_is_inf_or_nan((chan)->f[3])); in check_inf_or_nan() 992 print_chan(const char *msg, const union tgsi_exec_channel *chan) in print_chan() argument 995 msg, chan->f[0], chan->f[1], chan->f[2], chan->f[3]); in print_chan() 1049 uint i, chan; in tgsi_check_soa_dependencies() local 1071 for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) { in tgsi_check_soa_dependencies() 1072 if (inst->Dst[0].Register.WriteMask & (1 << chan)) { in tgsi_check_soa_dependencies() [all …]
|
/external/speex/libspeexdsp/ |
D | mdf.c | 694 int i,j, chan, speak; in speex_echo_cancellation() local 722 for (chan = 0; chan < C; chan++) in speex_echo_cancellation() 725 …filter_dc_notch16(in+chan, st->notch_radius, st->input+chan*st->frame_size, st->frame_size, st->no… in speex_echo_cancellation() 732 …tmp32 = SUB32(EXTEND32(st->input[chan*st->frame_size+i]), EXTEND32(MULT16_16_P15(st->preemph, st->… in speex_echo_cancellation() 747 st->memD[chan] = st->input[chan*st->frame_size+i]; in speex_echo_cancellation() 748 st->input[chan*st->frame_size+i] = EXTRACT16(tmp32); in speex_echo_cancellation() 797 for (chan = 0; chan < C; chan++) in speex_echo_cancellation() 801 spectral_mul_accum16(st->X, st->foreground+chan*N*K*M, st->Y+chan*N, N, M*K); in speex_echo_cancellation() 802 spx_ifft(st->fft_table, st->Y+chan*N, st->e+chan*N); in speex_echo_cancellation() 804 st->e[chan*N+i] = SUB16(st->input[chan*st->frame_size+i], st->e[chan*N+i+st->frame_size]); in speex_echo_cancellation() [all …]
|