Searched refs:chipsets (Results 1 – 12 of 12) sorted by relevance
| /external/libdrm/intel/ |
| D | test_decode.c | 140 } chipsets[] = { in infer_devid() local
154 for (i = 0; chipsets[i].name != NULL; i++) { in infer_devid()
155 if (strstr(batch_filename, chipsets[i].name)) in infer_devid()
156 return chipsets[i].devid; in infer_devid()
162 for (i = 0; chipsets[i].name != NULL; i++) { in infer_devid()
163 fprintf(stderr, " %s\n", chipsets[i].name); in infer_devid()
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| /external/autotest/client/bin/ |
| D | update_intel_pci_ids | 60 chipsets = []
63 chipsets.extend(sp.check_output(cmd + id_file,
65 for cset in chipsets:
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| /external/u-boot/doc/device-tree-bindings/mtd/spi/ |
| D | spi-flash.txt | 15 apply to Intel chipsets, which tend to memory-map flash.
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| /external/libdrm/ |
| D | README | 7 for chipsets with drm memory manager, support for tracking relocations
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| /external/u-boot/arch/x86/include/asm/acpi/ |
| D | irqlinks.asl | 12 * The programming interface is common to most Intel chipsets. But the PRTx
13 * registers may be mapped to different blocks. Some chipsets map them to LPC
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| /external/u-boot/drivers/usb/host/ |
| D | Kconfig | 238 with Intel PCI chipsets (like intel 430TX, 440FX, 440LX, 440BX,
239 i810, i820) conform to this standard. Also all VIA PCI chipsets
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| /external/mesa3d/src/gallium/docs/source/ |
| D | distro.rst | 13 Driver for Intel i915 and i945 chipsets.
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| /external/u-boot/drivers/net/ |
| D | Kconfig | 239 PCI chipsets/adapters.
245 PCI/PCIe chipsets/adapters.
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| /external/u-boot/arch/x86/ |
| D | Kconfig | 695 routable. On most older chipsets, this is 4, PIRQA through PIRQD.
696 Some newer chipsets offer more than four links, commonly up to PIRQH.
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| /external/wpa_supplicant_8/hostapd/ |
| D | README | 79 chipsets.
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| /external/u-boot/doc/ |
| D | README.x86 | 245 with mobile Intel HM76 and QM77 chipsets platform. Download it from Intel FSP
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| /external/wpa_supplicant_8/wpa_supplicant/ |
| D | ChangeLog | 1227 * added support (Linux only) for RoboSwitch chipsets (often found in
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