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Searched refs:clk_set_rate (Results 1 – 25 of 49) sorted by relevance

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/external/u-boot/drivers/clk/tegra/
Dtegra186-clk.c41 req.clk_set_rate.rate = rate; in tegra186_clk_set_rate()
48 return resp.clk_set_rate.rate; in tegra186_clk_set_rate()
/external/perfetto/src/traced/probes/ftrace/test/data/synthetic/
Davailable_events7 clk:clk_set_rate
/external/u-boot/arch/arm/include/asm/kona-common/
Dclk.h22 int clk_set_rate(struct clk *clk, unsigned long rate);
/external/perfetto/src/traced/probes/ftrace/test/data/synthetic/events/clk/clk_set_rate/
Dformat1 name: clk_set_rate
/external/u-boot/drivers/mmc/
Duniphier-sd.c46 priv->mclk = clk_set_rate(&clk, ULONG_MAX); in uniphier_sd_probe()
Drockchip_sdhci.c54 ret = clk_set_rate(&clk, max_frequency); in arasan_sdhci_probe()
Datmel_sdhci.c82 ret = clk_set_rate(&clk, ATMEL_SDHC_GCK_RATE); in atmel_sdhci_probe()
Dmsm_sdhci.c78 ret = clk_set_rate(&clk, clk_rate); in msm_sdc_clk_init()
Drockchip_dw_mmc.c42 ret = clk_set_rate(&priv->clk, freq); in rockchip_dwmmc_get_mmc_clk()
Dtegra_mmc.c372 rate = clk_set_rate(&priv->clk, clock); in tegra_mmc_change_clock()
639 ret = clk_set_rate(&priv->clk, 20000000); in tegra_mmc_probe()
/external/u-boot/arch/arm/cpu/armv7/bcm281xx/
Dclk-sdio.c59 ret = clk_set_rate(c, rate); in clk_sdio_enable()
/external/u-boot/arch/arm/cpu/armv7/bcm235xx/
Dclk-sdio.c59 ret = clk_set_rate(c, rate); in clk_sdio_enable()
/external/u-boot/board/synopsys/hsdk/
Dclk-lib.c41 ret = clk_set_rate(&clk, priv_rate); in soc_clk_ctl()
/external/u-boot/drivers/clk/at91/
Dclk-system.c67 return clk_set_rate(&clk_dev, rate); in system_clk_set_rate()
/external/u-boot/drivers/video/rockchip/
Drk3288_hdmi.c69 ret = clk_set_rate(&clk, 384000000); in rk3288_clk_config()
/external/u-boot/include/
Dclk.h246 ulong clk_set_rate(struct clk *clk, ulong rate);
/external/u-boot/arch/arm/include/asm/arch-tegra/
Dbpmp_abi.h937 struct cmd_clk_set_rate_request clk_set_rate; member
981 struct cmd_clk_set_rate_response clk_set_rate; member
/external/u-boot/drivers/clk/
Dclk-uclass.c221 ret = clk_set_rate(&clk, rates[index]); in clk_set_default_rates()
335 ulong clk_set_rate(struct clk *clk, ulong rate) in clk_set_rate() function
Dclk_sandbox_test.c61 return clk_set_rate(&sbct->clks[id], rate); in sandbox_clk_test_set_rate()
/external/u-boot/drivers/net/
Dgmac_rockchip.c461 rate = clk_set_rate(&clk, 125000000); in gmac_rockchip_probe()
476 rate = clk_set_rate(&clk, 50000000); in gmac_rockchip_probe()
/external/u-boot/arch/arm/mach-rockchip/
Drk3188-board-spl.c89 ret = clk_set_rate(&clk, 600000000); in setup_arm_clock()
Drk3288-board.c121 ret = clk_set_rate(&clk, 1800000000); in veyron_init()
/external/u-boot/drivers/adc/
Drockchip-saradc.c109 ret = clk_set_rate(&clk, priv->data->clk_rate); in rockchip_saradc_probe()
/external/u-boot/drivers/serial/
Dserial_msm.c182 ret = clk_set_rate(&clk, clk_rate); in msm_uart_clk_init()
/external/u-boot/drivers/video/
Dipu_disp.c877 clk_set_rate(di_parent, in ipu_init_sync_panel()
880 clk_set_rate(g_di_clk[disp], in ipu_init_sync_panel()
891 clk_set_rate(g_pixel_clk[disp], rounded_pixel_clk); in ipu_init_sync_panel()

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