Searched refs:clk_src (Results 1 – 10 of 10) sorted by relevance
| /external/u-boot/arch/arm/mach-socfpga/ |
| D | clock_manager_arria10.c | 899 unsigned int clk_src, divisor, nocclk, src_hz; in cm_get_noc_clk_hz() local
902 clk_src = (nocclk >> CLKMGR_MAINPLL_NOCCLK_SRC_LSB) & in cm_get_noc_clk_hz()
907 if (clk_src == CLKMGR_PERPLLGRP_SRC_MAIN) { in cm_get_noc_clk_hz()
912 } else if (clk_src == CLKMGR_PERPLLGRP_SRC_PERI) { in cm_get_noc_clk_hz()
919 } else if (clk_src == CLKMGR_PERPLLGRP_SRC_OSC1) { in cm_get_noc_clk_hz()
921 } else if (clk_src == CLKMGR_PERPLLGRP_SRC_INTOSC) { in cm_get_noc_clk_hz()
923 } else if (clk_src == CLKMGR_PERPLLGRP_SRC_FPGA) { in cm_get_noc_clk_hz()
972 u32 clk_src, mainmpuclk_reg; in cm_get_mpu_clk_hz() local
976 clk_src = (mainmpuclk_reg >> CLKMGR_MAINPLL_MPUCLK_SRC_LSB) & in cm_get_mpu_clk_hz()
981 switch (clk_src) { in cm_get_mpu_clk_hz()
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| /external/u-boot/drivers/spi/ |
| D | mxc_spi.c | 95 u32 clk_src; in spi_cfg_mxc() local
100 clk_src = mxc_get_clock(MXC_CSPI_CLK); in spi_cfg_mxc()
102 div = DIV_ROUND_UP(clk_src, max_hz); in spi_cfg_mxc()
106 max_hz, div, clk_src / (4 << div)); in spi_cfg_mxc()
132 u32 clk_src = mxc_get_clock(MXC_CSPI_CLK); in spi_cfg_mxc() local
150 if (clk_src > max_hz) { in spi_cfg_mxc()
151 pre_div = (clk_src - 1) / max_hz; in spi_cfg_mxc()
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| /external/u-boot/board/freescale/s32v234evb/ |
| D | clock.c | 19 u32 clk_src; in select_pll_source_clk() local
26 clk_src = SRC_GPR1_FIRC_CLK_SOURCE; in select_pll_source_clk()
29 clk_src = SRC_GPR1_XOSC_CLK_SOURCE; in select_pll_source_clk()
53 writel(readl(&src->gpr1) | SRC_GPR1_PLL_SOURCE(pll_idx, clk_src), in select_pll_source_clk()
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| /external/u-boot/drivers/mmc/ |
| D | meson_gx_mmc.c | 35 unsigned int clk, clk_src, clk_div; in meson_mmc_config_clock() local
43 clk_src = CLK_SRC_DIV2; in meson_mmc_config_clock()
46 clk_src = CLK_SRC_24M; in meson_mmc_config_clock()
57 meson_mmc_clk |= clk_src; in meson_mmc_config_clock()
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| /external/u-boot/arch/arm/mach-imx/mx5/ |
| D | clock.c | 796 u32 clk_src; in config_ddr_clk() local
806 clk_src = get_periph_clk(); in config_ddr_clk()
826 if ((clk_src % emi_clk) < 10000000) in config_ddr_clk()
827 div = clk_src / emi_clk; in config_ddr_clk()
829 div = (clk_src / emi_clk) + 1; in config_ddr_clk()
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| /external/u-boot/drivers/phy/marvell/ |
| D | comphy.h | 87 bool clk_src; member
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| D | comphy_core.c | 134 comphy_map_data[lane].clk_src = fdtdec_get_bool(blob, subnode, in comphy_probe()
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| D | comphy_cp110.c | 86 static int comphy_pcie_power_up(u32 lane, u32 pcie_width, bool clk_src, in comphy_pcie_power_up() argument
129 if (pcie_clk && clk_src && (lane == 5)) { in comphy_pcie_power_up()
1999 lane, pcie_width, ptr_comphy_map->clk_src, in comphy_cp110_init()
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| /external/u-boot/arch/arm/cpu/armv7/bcm281xx/ |
| D | clk-core.h | 66 struct clk_src *src;
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| /external/u-boot/arch/arm/cpu/armv7/bcm235xx/ |
| D | clk-core.h | 66 struct clk_src *src;
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