| /external/u-boot/drivers/mmc/ |
| D | gen_atmel_mci.c | 105 u32 clkdiv = 255; local
114 clkdiv = DIV_ROUND_UP(bus_hz, hz) - 2;
115 if (clkdiv > 511)
116 clkdiv = 511;
118 clkodd = clkdiv & 1;
119 clkdiv >>= 1;
122 bus_hz / (clkdiv * 2 + clkodd + 2), blklen);
125 for (clkdiv = 0; clkdiv < 255; clkdiv++) {
126 if ((bus_hz / (clkdiv + 1) / 2) <= hz)
130 (bus_hz / (clkdiv + 1)) / 2, blklen);
[all …]
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| D | arm_pl180_mmci.c | 291 u32 clkdiv = 0; in host_set_ios() local
295 clkdiv = 0; in host_set_ios()
298 clkdiv = (host->clock_in / dev->clock) - 2; in host_set_ios()
301 tmp_clock = host->clock_in / (clkdiv + 2); in host_set_ios()
303 clkdiv++; in host_set_ios()
304 tmp_clock = host->clock_in / (clkdiv + 2); in host_set_ios()
307 if (clkdiv > SDI_CLKCR_CLKDIV_MASK) in host_set_ios()
308 clkdiv = SDI_CLKCR_CLKDIV_MASK; in host_set_ios()
310 tmp_clock = host->clock_in / (clkdiv + 2); in host_set_ios()
313 sdi_clkcr |= clkdiv; in host_set_ios()
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| D | sh_sdhi.c | 173 u32 clkdiv, i, timeout; in sh_sdhi_clock_control() local
186 clkdiv = 0x80; in sh_sdhi_clock_control()
188 for (; clkdiv && clk >= (i << 1); (clkdiv >>= 1)) in sh_sdhi_clock_control()
191 sh_sdhi_writew(host, SDHI_CLK_CTRL, clkdiv); in sh_sdhi_clock_control()
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| /external/u-boot/board/sbc8548/ |
| D | sbc8548.c | 60 uint clkdiv, lbc_mhz, lcrr = CONFIG_SYS_LBC_LCRR; in local_bus_init() local
66 clkdiv = sysinfo.freq_systembus / sysinfo.freq_localbus; in local_bus_init()
68 debug("LCRR=0x%x, CD=%d, MHz=%d\n", lcrr, clkdiv, lbc_mhz); in local_bus_init()
71 if (clkdiv == 16) { in local_bus_init()
73 } else if (clkdiv == 8) { in local_bus_init()
75 } else if (clkdiv == 4) { in local_bus_init()
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| /external/u-boot/board/freescale/mpc8568mds/ |
| D | mpc8568mds.c | 132 uint clkdiv; in local_bus_init() local
136 clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2; in local_bus_init()
139 if (clkdiv == 16) { in local_bus_init()
141 } else if (clkdiv == 8) { in local_bus_init()
143 } else if (clkdiv == 4) { in local_bus_init()
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| /external/u-boot/drivers/mtd/nand/ |
| D | lpc32xx_nand_mlc.c | 85 #define clkdiv(v, w, o) (((1+(clk/v)) & w) << o) macro
138 clkdiv(CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY, 0x03, 24) | in lpc32xx_nand_init()
139 clkdiv(CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY, 0x1F, 19) | in lpc32xx_nand_init()
140 clkdiv(CONFIG_LPC32XX_NAND_MLC_NAND_TA, 0x07, 16) | in lpc32xx_nand_init()
141 clkdiv(CONFIG_LPC32XX_NAND_MLC_RD_HIGH, 0x0F, 12) | in lpc32xx_nand_init()
142 clkdiv(CONFIG_LPC32XX_NAND_MLC_RD_LOW, 0x0F, 8) | in lpc32xx_nand_init()
143 clkdiv(CONFIG_LPC32XX_NAND_MLC_WR_HIGH, 0x0F, 4) | in lpc32xx_nand_init()
144 clkdiv(CONFIG_LPC32XX_NAND_MLC_WR_LOW, 0x0F, 0), in lpc32xx_nand_init()
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| /external/u-boot/board/freescale/mpc8548cds/ |
| D | mpc8548cds.c | 69 uint clkdiv; in local_bus_init() local
73 clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2; in local_bus_init()
76 if (clkdiv == 16) { in local_bus_init()
78 } else if (clkdiv == 8) { in local_bus_init()
80 } else if (clkdiv == 4) { in local_bus_init()
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| /external/u-boot/board/freescale/mpc8569mds/ |
| D | mpc8569mds.c | 290 uint clkdiv; in local_bus_init() local
294 clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2; in local_bus_init()
297 if (clkdiv == 16) in local_bus_init()
299 else if (clkdiv == 8) in local_bus_init()
301 else if (clkdiv == 4) in local_bus_init()
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| /external/u-boot/drivers/clk/ |
| D | clk_stm32mp1.c | 1421 static int set_clkdiv(unsigned int clkdiv, u32 address) in set_clkdiv() argument
1426 clrsetbits_le32(address, RCC_DIVR_DIV_MASK, clkdiv & RCC_DIVR_DIV_MASK); in set_clkdiv()
1431 clkdiv, address, readl(address)); in set_clkdiv()
1437 u32 clksrc, u32 clkdiv) in stm32mp1_mco_csg() argument
1454 clkdiv << RCC_MCOCFG_MCODIV_SHIFT); in stm32mp1_mco_csg()
1500 unsigned int clkdiv[CLKDIV_NB]; in stm32mp1_clktree() local
1515 ret = dev_read_u32_array(dev, "st,clkdiv", clkdiv, CLKDIV_NB); in stm32mp1_clktree()
1538 stm32mp1_mco_csg(priv, clksrc[CLKSRC_MCO1], clkdiv[CLKDIV_MCO1]); in stm32mp1_clktree()
1539 stm32mp1_mco_csg(priv, clksrc[CLKSRC_MCO2], clkdiv[CLKDIV_MCO2]); in stm32mp1_clktree()
1596 writel(clkdiv[CLKDIV_MPU] & RCC_DIVR_DIV_MASK, rcc + RCC_MPCKDIVR); in stm32mp1_clktree()
[all …]
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| /external/u-boot/board/freescale/mpc8555cds/ |
| D | mpc8555cds.c | 234 uint clkdiv; in local_bus_init() local
249 clkdiv = lbc->lcrr & LCRR_CLKDIV; in local_bus_init()
250 lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv; in local_bus_init()
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| /external/u-boot/board/freescale/mpc8541cds/ |
| D | mpc8541cds.c | 236 uint clkdiv; in local_bus_init() local
251 clkdiv = lbc->lcrr & LCRR_CLKDIV; in local_bus_init()
252 lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv; in local_bus_init()
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| /external/u-boot/drivers/net/ |
| D | davinci_emac.c | 149 u_int32_t clkdiv; in davinci_eth_mdio_enable() local
151 clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV; in davinci_eth_mdio_enable()
153 writel((clkdiv & 0xff) | in davinci_eth_mdio_enable()
417 u_int32_t clkdiv, cnt, mac_control; in davinci_eth_open() local
435 clkdiv = readl(&adap_ewrap->EWCTL); in davinci_eth_open()
500 clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV; in davinci_eth_open()
501 writel((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT, in davinci_eth_open()
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| D | keystone_net.c | 122 u_int32_t clkdiv; in keystone2_mdio_reset() local
125 clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1; in keystone2_mdio_reset()
127 writel((clkdiv & 0xffff) | MDIO_CONTROL_ENABLE | in keystone2_mdio_reset()
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| /external/u-boot/board/socrates/ |
| D | socrates.c | 139 uint clkdiv; in local_bus_init() local
144 clkdiv = lbc->lcrr & LCRR_CLKDIV; in local_bus_init()
145 lbc_mhz = sysinfo.freq_systembus / 1000000 / clkdiv; in local_bus_init()
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| /external/u-boot/drivers/i2c/ |
| D | rk_i2c.c | 61 writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv); in rk_i2c_set_clk()
66 debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv)); in rk_i2c_set_clk()
75 debug("i2c_clkdiv: 0x%08x\n", readl(®s->clkdiv)); in rk_i2c_show_regs()
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| /external/u-boot/arch/arm/include/asm/arch-rockchip/ |
| D | i2c.h | 12 u32 clkdiv; member
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| /external/u-boot/doc/device-tree-bindings/clock/ |
| D | st,stm32mp1.txt | 30 - st,clkdiv : The div parameters in this order
116 st,clkdiv = <
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| /external/u-boot/arch/arm/dts/ |
| D | stm32mp157c-ed1-u-boot.dtsi | 61 st,clkdiv = <
|