Searched refs:clrlwi (Results 1 – 25 of 34) sorted by relevance
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | fast-isel-conversion.ll | 214 ; PPC970: clrlwi {{[0-9]+}}, {{[0-9]+}}, 16
219 ; SPE: clrlwi {{[0-9]+}}, {{[0-9]+}}, 16
235 ; PPC970: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
240 ; SPE: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
288 ; PPC970: clrlwi {{[0-9]+}}, {{[0-9]+}}, 16
292 ; SPE: clrlwi {{[0-9]+}}, {{[0-9]+}}, 16
308 ; PPC970: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
312 ; SPE: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
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| D | funnel-shift-rot.ll | 44 ; CHECK-NEXT: clrlwi 6, 3, 16
46 ; CHECK-NEXT: clrlwi 5, 5, 28
135 ; CHECK-NEXT: clrlwi 6, 3, 16
137 ; CHECK-NEXT: clrlwi 5, 5, 28
150 ; CHECK-NEXT: clrlwi 4, 4, 27
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| D | fast-isel-ext.ll | 8 ; ELF64: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
15 ; ELF64: clrlwi {{[0-9]+}}, {{[0-9]+}}, 16
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| D | stack-realign.ll | 81 ; CHECK-32-DAG: clrlwi [[REG:[0-9]+]], 1, 27
94 ; CHECK-32-PIC-DAG: clrlwi [[REG:[0-9]+]], 1, 27
142 ; CHECK-32-DAG: clrlwi [[REG3:[0-9]+]], 1, 27
160 ; CHECK-32-PIC-DAG: clrlwi [[REG3:[0-9]+]], 1, 27
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| D | testComparesi32ltu.ll | 16 ; CHECK-DAG: clrlwi r3, r3, 31
19 ; CHECK-DAG: clrlwi r4, r4, 31
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| D | testComparesi32gtu.ll | 16 ; CHECK-DAG: clrlwi r3, r3, 31
19 ; CHECK-DAG: clrlwi r4, r4, 31
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| D | fabs.ll | 18 ; CHECK-NEXT: clrlwi r2, r2, 1
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| D | rlwimi-and.ll | 32 ; CHECK: clrlwi [[R1:[0-9]+]], {{[0-9]+}}, 31
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| D | zext-free.ll | 33 ; CHECK-NOT: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
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| D | cmpb-ppc32.ll | 20 ; CHECK: clrlwi 3, [[REG1]], 16
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| D | rotl-2.ll | 2 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | grep clrlwi | count 2
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| D | funnel-shift.ll | 23 ; CHECK-NEXT: clrlwi 6, 6, 27
135 ; CHECK-NEXT: clrlwi 6, 6, 27
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| D | bool-math.ll | 113 ; CHECK-NEXT: clrlwi 3, 3, 31
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| D | fast-isel-cmp-imm.ll | 213 ; ELF64: clrlwi
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | fast-isel-ext.ll | 8 ; ELF64: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
15 ; ELF64: clrlwi {{[0-9]+}}, {{[0-9]+}}, 16
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| D | stack-realign.ll | 81 ; CHECK-32-DAG: clrlwi [[REG:[0-9]+]], 1, 27
90 ; CHECK-32-PIC-DAG: clrlwi [[REG:[0-9]+]], 1, 27
132 ; CHECK-32-DAG: clrlwi [[REG3:[0-9]+]], 1, 27
146 ; CHECK-32-PIC-DAG: clrlwi [[REG3:[0-9]+]], 1, 27
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| D | fabs.ll | 20 ; CHECK-NEXT: clrlwi r2, r2, 1
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| D | fast-isel-conversion.ll | 256 ; PPC970: clrlwi {{[0-9]+}}, {{[0-9]+}}, 16
280 ; PPC970: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
345 ; PPC970: clrlwi {{[0-9]+}}, {{[0-9]+}}, 16
368 ; PPC970: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
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| D | zext-free.ll | 33 ; CHECK-NOT: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
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| D | rlwimi-and.ll | 32 ; CHECK: clrlwi [[R1:[0-9]+]], {{[0-9]+}}, 31
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| D | cmpb-ppc32.ll | 20 ; CHECK: clrlwi 3, [[REG1]], 16
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| D | rotl-2.ll | 2 ; RUN: llc < %s -march=ppc32 | grep clrlwi | count 2
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| D | fast-isel-cmp-imm.ll | 204 ; ELF64: clrlwi
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| /external/v8/src/ppc/ |
| D | macro-assembler-ppc.h | 83 #define ClearLeftImm clrlwi
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-ext.s | 3395 # CHECK-BE: clrlwi 2, 3, 4 # encoding: [0x54,0x62,0x01,0x3e]
3396 # CHECK-LE: clrlwi 2, 3, 4 # encoding: [0x3e,0x01,0x62,0x54]
3397 clrlwi 2, 3, 4
3398 # CHECK-BE: clrlwi. 2, 3, 4 # encoding: [0x54,0x62,0x01,0x3f]
3399 # CHECK-LE: clrlwi. 2, 3, 4 # encoding: [0x3f,0x01,0x62,0x54]
3400 clrlwi. 2, 3, 4
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