| /external/u-boot/common/ |
| D | avb_verify.c | 188 char *cmdarg[AVB_MAX_ARGS]; in avb_set_enforce_option() local
193 memset(cmdarg, 0, sizeof(cmdarg)); in avb_set_enforce_option()
194 cmdarg[i++] = strtok((char *)cmdline, " "); in avb_set_enforce_option()
197 cmdarg[i] = strtok(NULL, " "); in avb_set_enforce_option()
198 if (!cmdarg[i]) in avb_set_enforce_option()
209 i = avb_find_dm_args(&cmdarg[0], VERITY_TABLE_OPT_LOGGING); in avb_set_enforce_option()
211 cmdarg[i] = (char *)option; in avb_set_enforce_option()
213 i = avb_find_dm_args(&cmdarg[0], VERITY_TABLE_OPT_RESTART); in avb_set_enforce_option()
219 cmdarg[i] = (char *)option; in avb_set_enforce_option()
223 newargs = append_cmd_line(newargs, cmdarg[i]); in avb_set_enforce_option()
|
| /external/u-boot/drivers/mmc/ |
| D | mmc_write.c | 39 cmd.cmdarg = start; in mmc_erase_t()
47 cmd.cmdarg = end; in mmc_erase_t()
54 cmd.cmdarg = MMC_ERASE_ARG; in mmc_erase_t()
150 cmd.cmdarg = start; in mmc_write_blocks()
152 cmd.cmdarg = start * mmc->write_bl_len; in mmc_write_blocks()
171 cmd.cmdarg = 0; in mmc_write_blocks()
|
| D | mmc_boot.c | 32 cmd.cmdarg = MMC_CMD62_ARG1; in mmc_boot_partition_size_change()
43 cmd.cmdarg = MMC_CMD62_ARG2; in mmc_boot_partition_size_change()
56 cmd.cmdarg = bootsize; in mmc_boot_partition_size_change()
68 cmd.cmdarg = rpmbsize; in mmc_boot_partition_size_change()
|
| D | mmc.c | 70 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); in mmmc_trace_before_send()
215 cmd.cmdarg = mmc->rca << 16; in mmc_send_status()
262 cmd.cmdarg = len; in mmc_set_blocklen()
335 cmd.cmdarg = 0; in mmc_send_tuning()
366 cmd.cmdarg = start; in mmc_read_blocks()
368 cmd.cmdarg = start * mmc->read_bl_len; in mmc_read_blocks()
382 cmd.cmdarg = 0; in mmc_read_blocks()
460 cmd.cmdarg = 0; in mmc_go_idle()
487 cmd.cmdarg = 0; in mmc_switch_voltage()
544 cmd.cmdarg = 0; in sd_send_op_cond()
[all …]
|
| D | mmc_spi.c | 53 static uint mmc_spi_sendcmd(struct mmc *mmc, ushort cmdidx, u32 cmdarg) in mmc_spi_sendcmd() argument
61 cmdo[2] = cmdarg >> 24; in mmc_spi_sendcmd()
62 cmdo[3] = cmdarg >> 16; in mmc_spi_sendcmd()
63 cmdo[4] = cmdarg >> 8; in mmc_spi_sendcmd()
64 cmdo[5] = cmdarg; in mmc_spi_sendcmd()
181 cmd->cmdidx, cmd->resp_type, cmd->cmdarg); in mmc_spi_request()
184 r1 = mmc_spi_sendcmd(mmc, cmd->cmdidx, cmd->cmdarg); in mmc_spi_request()
|
| D | sandbox_mmc.c | 52 if ((cmd->cmdarg & 0xF) == UHS_SDR12_BUS_SPEED) in sandbox_mmc_send_cmd()
53 resp[4] = (cmd->cmdarg & 0xF) << 24; in sandbox_mmc_send_cmd()
72 debug("block len %d\n", cmd->cmdarg); in sandbox_mmc_send_cmd()
|
| D | gen_atmel_mci.c | 274 writel(cmd->cmdarg, &mci->argr);
278 dump_cmd(cmdr, cmd->cmdarg, 0, "DEBUG");
285 dump_cmd(cmdr, cmd->cmdarg, status, "Command Time Out");
288 dump_cmd(cmdr, cmd->cmdarg, status, "Command Failed");
337 dump_cmd(cmdr, cmd->cmdarg, status,
349 dump_cmd(cmdr, cmd->cmdarg, status,
356 dump_cmd(cmdr, cmd->cmdarg, status,
|
| D | rpmb.c | 82 cmd.cmdarg = blockcount & 0x0000FFFF; in mmc_set_blockcount()
84 cmd.cmdarg |= 1 << 31; in mmc_set_blockcount()
105 cmd.cmdarg = 0; in mmc_rpmb_request()
137 cmd.cmdarg = 0; in mmc_rpmb_response()
|
| D | mvebu_mmc.c | 75 DRIVER_NAME, cmd->cmdidx, cmd->resp_type, cmd->cmdarg); in mvebu_mmc_send_cmd()
155 mvebu_mmc_write(SDIO_ARG_LOW, cmd->cmdarg & 0xffff); in mvebu_mmc_send_cmd()
156 mvebu_mmc_write(SDIO_ARG_HI, cmd->cmdarg >> 16); in mvebu_mmc_send_cmd()
|
| D | pxa_mmc_gen.c | 126 writel(cmd->cmdarg >> 16, ®s->argh); in pxa_mmc_start_cmd()
127 writel(cmd->cmdarg & 0xffff, ®s->argl); in pxa_mmc_start_cmd()
|
| D | sh_sdhi.c | 541 opc, cmd->cmdarg, cmd->resp_type); in sh_sdhi_start_cmd()
576 (unsigned short)(cmd->cmdarg & ARG0_MASK)); in sh_sdhi_start_cmd()
578 (unsigned short)((cmd->cmdarg >> 16) & ARG1_MASK)); in sh_sdhi_start_cmd()
|
| D | fsl_esdhc.c | 40 uint cmdarg; /* Command argument register */ member
439 esdhc_write32(®s->cmdarg, cmd->cmdarg); in esdhc_send_cmd_common()
787 cmd.cmdarg = 0; in esdhc_stop_tuning()
|
| D | tegra_mmc.c | 173 debug("cmd->arg: %08x\n", cmd->cmdarg); in tegra_mmc_send_cmd_bounced()
174 writel(cmd->cmdarg, &priv->reg->argument); in tegra_mmc_send_cmd_bounced()
|
| D | stm32_sdmmc2.c | 255 writel(cmd->cmdarg, priv->base + SDMMC_ARG); in stm32_sdmmc2_start_cmd()
419 stop_cmd.cmdarg = 0; in stm32_sdmmc2_send_cmd()
|
| D | sunxi_mmc.c | 367 cmd->cmdidx, cmdval | cmd->cmdidx, cmd->cmdarg); in sunxi_mmc_send_cmd_common()
368 writel(cmd->cmdarg, &priv->reg->arg); in sunxi_mmc_send_cmd_common()
|
| D | meson_gx_mmc.c | 190 meson_write(mmc, cmd->cmdarg, MESON_SD_EMMC_CMD_ARG); in meson_dm_mmc_send_cmd()
|
| D | tmio-common.c | 414 tmio_sd_writel(priv, cmd->cmdarg, TMIO_SD_ARG); in tmio_sd_send_cmd()
460 cmd->cmdidx, tmp, cmd->cmdarg); in tmio_sd_send_cmd()
|
| D | sh_mmcif.c | 473 debug("CMD%d ARG:%08x\n", cmd->cmdidx, cmd->cmdarg); in sh_mmcif_start_cmd()
475 sh_mmcif_write(cmd->cmdarg, &host->regs->ce_arg); in sh_mmcif_start_cmd()
|
| D | zynq_sdhci.c | 117 cmd.cmdarg = 0; in arasan_sdhci_execute_tuning()
|
| D | davinci_mmc.c | 212 set_val(®s->mmcarghl, cmd->cmdarg); in dmmc_send_cmd()
|
| D | mxsmmc.c | 194 writel(cmd->cmdarg, &ssp_regs->hw_ssp_cmd1); in mxsmmc_send_cmd()
|
| D | mxcmmc.c | 189 writel(cmd->cmdarg, &host->base->arg); in mxcmci_start_cmd()
|
| D | ftsdc010_mci.c | 70 uint32_t arg = mmc_cmd->cmdarg; in ftsdc010_send_cmd()
|
| /external/autotest/venv/skylab_staging/ |
| D | swarming.py | 67 cmdarg = path
69 cmdarg += "?%s" % urllib.urlencode(qargs)
71 cmd = self._base_cmd('query') + [cmdarg]
|
| /external/u-boot/include/ |
| D | mmc.h | 373 uint cmdarg; member
|