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/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/SystemZ/
Dscalar-cmp-cmp-log-sel.ll7 %cmp0 = icmp eq i8 %val1, %val2
9 %and = and i1 %cmp0, %cmp1
14 ; CHECK: cost of 3 for instruction: %cmp0 = icmp eq i8 %val1, %val2
16 ; CHECK: cost of 1 for instruction: %and = and i1 %cmp0, %cmp1
22 %cmp0 = icmp eq i8 %val1, %val2
24 %and = and i1 %cmp0, %cmp1
29 ; CHECK: cost of 3 for instruction: %cmp0 = icmp eq i8 %val1, %val2
31 ; CHECK: cost of 1 for instruction: %and = and i1 %cmp0, %cmp1
37 %cmp0 = icmp eq i8 %val1, %val2
39 %and = and i1 %cmp0, %cmp1
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dsopk-compares.ll14 %cmp0 = icmp eq i32 %cond, 4
15 br i1 %cmp0, label %endif, label %if
30 %cmp0 = icmp eq i32 %cond, 32767
31 br i1 %cmp0, label %endif, label %if
46 %cmp0 = icmp eq i32 %cond, 32768
47 br i1 %cmp0, label %endif, label %if
62 %cmp0 = icmp ne i32 %cond, 32768
63 br i1 %cmp0, label %endif, label %if
78 %cmp0 = icmp eq i32 %cond, -32768
79 br i1 %cmp0, label %endif, label %if
[all …]
Dloop_break.ll9 ; OPT-NEXT: br i1 %cmp0, label %bb4, label %Flow
55 %cmp0 = icmp slt i32 %lsr.iv.next, 0
56 br i1 %cmp0, label %bb4, label %bb9
72 ; OPT-NEXT: br i1 %cmp0, label %bb4, label %Flow
99 %cmp0 = icmp slt i32 %lsr.iv.next, 0
100 br i1 %cmp0, label %bb4, label %Flow
125 ; OPT-NEXT: br i1 %cmp0, label %bb4, label %Flow
152 %cmp0 = icmp slt i32 %lsr.iv.next, 0
153 br i1 %cmp0, label %bb4, label %Flow
175 ; OPT: br i1 %cmp0, label %bb4, label %Flow
[all …]
Duniform-cfg.ll17 %cmp0 = icmp eq i32 %cond, 0
18 br i1 %cmp0, label %if, label %else
45 %cmp0 = fcmp oeq float %cond, 0.0
46 br i1 %cmp0, label %if, label %else
73 %cmp0 = icmp eq i32 %cond, 0
74 br i1 %cmp0, label %else, label %if
101 %cmp0 = fcmp oeq float %cond, 0.0
102 br i1 %cmp0, label %else, label %if
264 %cmp0 = icmp sgt i32 %cond0, 0
266 br i1 %cmp0, label %bb2, label %bb9
[all …]
Dxfail.r600.bitcast.ll19 %cmp0 = icmp eq i32 %cond, 0
20 br i1 %cmp0, label %if, label %end
35 %cmp0 = icmp eq i32 %cond, 0
36 br i1 %cmp0, label %if, label %end
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dvec-cmp-cmp-logic-select.ll16 %cmp0 = icmp eq <2 x i8> %val1, %val2
18 %and = and <2 x i1> %cmp0, %cmp1
32 %cmp0 = icmp eq <2 x i8> %val1, %val2
34 %and = and <2 x i1> %cmp0, %cmp1
49 %cmp0 = icmp eq <16 x i8> %val1, %val2
51 %and = or <16 x i1> %cmp0, %cmp1
72 %cmp0 = icmp eq <16 x i8> %val1, %val2
74 %and = or <16 x i1> %cmp0, %cmp1
95 %cmp0 = icmp eq <32 x i8> %val1, %val2
97 %and = xor <32 x i1> %cmp0, %cmp1
[all …]
/external/libavc/common/x86/
Dih264_resi_trans_quant_sse42.c114 __m128i sum0, sum1, sum2, cmp0, cmp1; in ih264_resi_trans_quant_4x4_sse42() local
289 cmp0 = _mm_cmpeq_epi16(temp0, zero_8x16b); in ih264_resi_trans_quant_4x4_sse42()
292 mask0 = _mm_movemask_epi8(cmp0); in ih264_resi_trans_quant_4x4_sse42()
301 cmp0 = _mm_and_si128(temp_1, cmp0); in ih264_resi_trans_quant_4x4_sse42()
302 sum0 = _mm_hadd_epi16(cmp0, zero_8x16b); in ih264_resi_trans_quant_4x4_sse42()
388 __m128i cmp0, cmp1, sum0, sum1, sum2; in ih264_resi_trans_quant_chroma_4x4_sse42() local
574 cmp0 = _mm_cmpeq_epi16(temp0, zero_8x16b); in ih264_resi_trans_quant_chroma_4x4_sse42()
577 mask0 = _mm_movemask_epi8(cmp0); in ih264_resi_trans_quant_chroma_4x4_sse42()
586 cmp0 = _mm_and_si128(temp_1, cmp0); in ih264_resi_trans_quant_chroma_4x4_sse42()
587 sum0 = _mm_hadd_epi16(cmp0, zero_8x16b); in ih264_resi_trans_quant_chroma_4x4_sse42()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dmovcc-double.ll13 %cmp0 = icmp ult i32 %a0, %a1
15 %and = and i1 %cmp0, %cmp1
28 %cmp0 = icmp ult i32 %a0, %a1
30 %and = or i1 %cmp0, %cmp1
43 %cmp0 = icmp ult i32 %a0, %a1
45 %or = or i1 %cmp0, %cmp1
/external/llvm/test/CodeGen/X86/
Dcmov-double.ll14 %cmp0 = icmp ult i32 %a0, %a1
16 %and = and i1 %cmp0, %cmp1
30 %cmp0 = icmp ult i32 %a0, %a1
32 %and = or i1 %cmp0, %cmp1
45 %cmp0 = icmp ult i32 %a0, %a1
47 %or = or i1 %cmp0, %cmp1
/external/llvm/test/CodeGen/ARM/
Dmovcc-double.ll13 %cmp0 = icmp ult i32 %a0, %a1
15 %and = and i1 %cmp0, %cmp1
28 %cmp0 = icmp ult i32 %a0, %a1
30 %and = or i1 %cmp0, %cmp1
43 %cmp0 = icmp ult i32 %a0, %a1
45 %or = or i1 %cmp0, %cmp1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dcmov-double.ll14 %cmp0 = icmp ult i32 %a0, %a1
16 %and = and i1 %cmp0, %cmp1
30 %cmp0 = icmp ult i32 %a0, %a1
32 %and = or i1 %cmp0, %cmp1
45 %cmp0 = icmp ult i32 %a0, %a1
47 %or = or i1 %cmp0, %cmp1
/external/libaom/libaom/aom_dsp/x86/
Dfwd_txfm_sse2.h38 __m128i cmp0 = _mm_or_si128(_mm_cmpeq_epi16(*preg0, max_overflow), in check_epi16_overflow_x2() local
42 cmp0 = _mm_or_si128(cmp0, cmp1); in check_epi16_overflow_x2()
43 return _mm_movemask_epi8(cmp0); in check_epi16_overflow_x2()
52 __m128i cmp0 = _mm_or_si128(_mm_cmpeq_epi16(*preg0, max_overflow), in check_epi16_overflow_x4() local
60 cmp0 = _mm_or_si128(_mm_or_si128(cmp0, cmp1), _mm_or_si128(cmp2, cmp3)); in check_epi16_overflow_x4()
61 return _mm_movemask_epi8(cmp0); in check_epi16_overflow_x4()
/external/llvm/test/Transforms/JumpThreading/
Dphi-known.ll8 %cmp0 = icmp eq i8* %p, null
9 br i1 %cmp0, label %exit, label %loop
25 %cmp0 = icmp eq i8* %p, null
26 br i1 %cmp0, label %exit, label %loop
53 %cmp0 = icmp eq i8* %p, null
54 br i1 %cmp0, label %exit, label %loop
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/JumpThreading/
Dphi-known.ll8 %cmp0 = icmp eq i8* %p, null
9 br i1 %cmp0, label %exit, label %loop
25 %cmp0 = icmp eq i8* %p, null
26 br i1 %cmp0, label %exit, label %loop
53 %cmp0 = icmp eq i8* %p, null
54 br i1 %cmp0, label %exit, label %loop
/external/llvm/test/Transforms/InstSimplify/
DAndOrXor.ll260 %cmp0 = icmp eq i32 %i, 0
261 %conv0 = zext i1 %cmp0 to i32
274 %cmp0 = icmp eq <4 x i32> %i, zeroinitializer
275 %conv0 = zext <4 x i1> %cmp0 to <4 x i32>
288 %cmp0 = icmp eq i3 %i, 0
289 %conv0 = sext i1 %cmp0 to i5
302 %cmp0 = icmp sgt <3 x i65> %i, zeroinitializer
303 %conv0 = bitcast <3 x i1> %cmp0 to i3
321 %cmp0 = icmp eq i8 %i, 0
322 %conv0 = zext i1 %cmp0 to i16
[all …]
/external/libaom/libaom/av1/encoder/x86/
Dhighbd_block_error_intrin_sse2.c22 __m128i max, min, cmp0, cmp1, cmp2, cmp3; in av1_highbd_block_error_sse2() local
36 cmp0 = _mm_xor_si128(_mm_cmpgt_epi32(mm_coeff, max), in av1_highbd_block_error_sse2()
45 _mm_or_si128(_mm_or_si128(cmp0, cmp1), _mm_or_si128(cmp2, cmp3))); in av1_highbd_block_error_sse2()
/external/libvpx/libvpx/vp9/encoder/x86/
Dvp9_highbd_block_error_intrin_sse2.c22 __m128i max, min, cmp0, cmp1, cmp2, cmp3; in vp9_highbd_block_error_sse2() local
36 cmp0 = _mm_xor_si128(_mm_cmpgt_epi32(mm_coeff, max), in vp9_highbd_block_error_sse2()
45 _mm_or_si128(_mm_or_si128(cmp0, cmp1), _mm_or_si128(cmp2, cmp3))); in vp9_highbd_block_error_sse2()
/external/libvpx/libvpx/vpx_dsp/x86/
Dfwd_txfm_sse2.h40 __m128i cmp0 = _mm_or_si128(_mm_cmpeq_epi16(*preg0, max_overflow), in check_epi16_overflow_x2() local
44 cmp0 = _mm_or_si128(cmp0, cmp1); in check_epi16_overflow_x2()
45 return _mm_movemask_epi8(cmp0); in check_epi16_overflow_x2()
54 __m128i cmp0 = _mm_or_si128(_mm_cmpeq_epi16(*preg0, max_overflow), in check_epi16_overflow_x4() local
62 cmp0 = _mm_or_si128(_mm_or_si128(cmp0, cmp1), _mm_or_si128(cmp2, cmp3)); in check_epi16_overflow_x4()
63 return _mm_movemask_epi8(cmp0); in check_epi16_overflow_x4()
/external/llvm/test/CodeGen/AMDGPU/
Duniform-cfg.ll16 %cmp0 = icmp eq i32 %cond, 0
17 br i1 %cmp0, label %if, label %else
46 %cmp0 = fcmp oeq float %cond, 0.0
47 br i1 %cmp0, label %if, label %else
73 %cmp0 = icmp eq i32 %cond, 0
74 br i1 %cmp0, label %else, label %if
103 %cmp0 = fcmp oeq float %cond, 0.0
104 br i1 %cmp0, label %else, label %if
265 %cmp0 = icmp sgt i32 %cond0, 0
267 br i1 %cmp0, label %bb2, label %bb9
/external/llvm/test/Transforms/SLPVectorizer/X86/
Dinsert-element-build-vector.ll23 %cmp0 = icmp ne i32 %c0, 0
27 %s0 = select i1 %cmp0, float %a0, float %b0
57 %cmp0 = icmp ne i32 %c0, 0
61 %s0 = select i1 %cmp0, float %a0, float %b0
99 %cmp0 = icmp ne i32 %c0, 0
103 %s0 = select i1 %cmp0, float %a0, float %b0
134 %cmp0 = icmp ne i32 %c0, 0
138 %s0 = select i1 %cmp0, float %a0, float %b0
167 %cmp0 = icmp ne i32 %c0, 0
171 %s0 = select i1 %cmp0, float %a0, float %b0
[all …]
/external/llvm/test/Transforms/Util/
Dflattencfg.ll10 %cmp0 = icmp eq i32 %in_a, -1
12 %cond0 = and i1 %cmp0, %cmp1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dsubs-to-sub-opt.ll18 %cmp0 = icmp eq i32 %s, -1
19 %cmp1 = sext i1 %cmp0 to i8
/external/llvm/test/CodeGen/AArch64/
Dsubs-to-sub-opt.ll18 %cmp0 = icmp eq i32 %s, -1
19 %cmp1 = sext i1 %cmp0 to i8
Dhalf.ll88 %cmp0 = fcmp ogt half 0xH3333, undef
90 %x = select i1 %cmp0, i16 0, i16 undef
91 %or = or i1 %cmp1, %cmp0
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Util/
Dflattencfg.ll10 %cmp0 = icmp eq i32 %in_a, -1
12 %cond0 = and i1 %cmp0, %cmp1

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