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Searched refs:cntlzd (Results 1 – 25 of 27) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
DtestComparesieqsll.ll17 ; CHECK-NEXT: cntlzd r3, r3
44 ; CHECK-NEXT: cntlzd r3, r3
73 ; CHECK-NEXT: cntlzd r3, r3
107 ; CHECK-NEXT: cntlzd r3, r3
DtestCompareslleqsll.ll16 ; CHECK-NEXT: cntlzd r3, r3
43 ; CHECK-NEXT: cntlzd r3, r3
72 ; CHECK-NEXT: cntlzd r3, r3
106 ; CHECK-NEXT: cntlzd r3, r3
DtestComparesllequll.ll16 ; CHECK-NEXT: cntlzd r3, r3
43 ; CHECK-NEXT: cntlzd r3, r3
72 ; CHECK-NEXT: cntlzd r3, r3
106 ; CHECK-NEXT: cntlzd r3, r3
DtestComparesiequll.ll17 ; CHECK-NEXT: cntlzd r3, r3
44 ; CHECK-NEXT: cntlzd r3, r3
73 ; CHECK-NEXT: cntlzd r3, r3
107 ; CHECK-NEXT: cntlzd r3, r3
Dlogic-ops-on-compares.ll75 ; CHECK-NEXT: cntlzd r6, r7
76 ; CHECK-NEXT: cntlzd r5, r5
134 ; CHECK-NEXT: cntlzd r5, r5
DtestComparesileull.ll43 ; CHECK: cntlzd [[REG1:r[0-9]+]], r3
97 ; CHECK: cntlzd [[REG1:r[0-9]+]], r3
DtestComparesllleull.ll43 ; CHECK: cntlzd [[REG1:r[0-9]+]], r3
97 ; CHECK: cntlzd [[REG1:r[0-9]+]], r3
D2007-03-24-cntlzd.ll15 ; CHECK-NEXT: cntlzd [[REG2:[0-9]+]], [[REG1]]
Dno-ext-with-count-zeros.ll49 ; CHECK: cntlzd 3, 3
Dmemcmp-mergeexpand.ll14 ; PPC64LE-NEXT: cntlzd 3, 3
Dexpand-isel.ll201 ; CHECK: cntlzd [[CZ:r[0-9]+]], [[XOR]]
/external/capstone/suite/MC/PowerPC/
Dppc64-encoding.s.cs160 0x7c,0x62,0x00,0x74 = cntlzd 2, 3
161 0x7c,0x62,0x00,0x75 = cntlzd. 2, 3
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
D2007-03-24-cntlzd.ll1 ; RUN: llc < %s -march=ppc64 -mcpu=g5 | grep cntlzd
/external/llvm/test/CodeGen/PowerPC/
D2007-03-24-cntlzd.ll15 ; CHECK-NEXT: cntlzd [[REG2:[0-9]+]], [[REG1]]
/external/llvm/test/MC/PowerPC/
Dppc64-encoding.s689 # CHECK-BE: cntlzd 2, 3 # encoding: [0x7c,0x62,0x00,0x74]
690 # CHECK-LE: cntlzd 2, 3 # encoding: [0x74,0x00,0x62,0x7c]
691 cntlzd 2, 3
692 # CHECK-BE: cntlzd. 2, 3 # encoding: [0x7c,0x62,0x00,0x75]
693 # CHECK-LE: cntlzd. 2, 3 # encoding: [0x75,0x00,0x62,0x7c]
694 cntlzd. 2, 3
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dppc64-encoding.s777 # CHECK-BE: cntlzd 2, 3 # encoding: [0x7c,0x62,0x00,0x74]
778 # CHECK-LE: cntlzd 2, 3 # encoding: [0x74,0x00,0x62,0x7c]
779 cntlzd 2, 3
780 # CHECK-BE: cntlzd. 2, 3 # encoding: [0x7c,0x62,0x00,0x75]
781 # CHECK-LE: cntlzd. 2, 3 # encoding: [0x75,0x00,0x62,0x7c]
782 cntlzd. 2, 3
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/
Dppc64le-encoding.txt538 # CHECK: cntlzd 2, 3
541 # CHECK: cntlzd. 2, 3
Dppc64-encoding.txt583 # CHECK: cntlzd 2, 3
586 # CHECK: cntlzd. 2, 3
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding.txt547 # CHECK: cntlzd 2, 3
550 # CHECK: cntlzd. 2, 3
Dppc64le-encoding.txt526 # CHECK: cntlzd 2, 3
529 # CHECK: cntlzd. 2, 3
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCSchedule.td138 // cntlzd IntRotateD
DREADME.txt747 test/CodeGen/PowerPC/2007-03-24-cntlzd.ll compiles to:
751 cntlzd r2, r2
DPPCInstr64Bit.td435 "cntlzd $rA, $rS", IntGeneral,
/external/v8/src/ppc/
Dconstants-ppc.h1124 V(cntlzd, CNTLZDX, 0x7C000074) \
/external/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td640 "cntlzd", "$rA, $rS", IIC_IntGeneral,

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