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Searched refs:cntr (Results 1 – 20 of 20) sorted by relevance

/external/u-boot/arch/arm/mach-orion5x/
Dtimer.c44 #define CTCR_ARM_TIMER_EN_OFFS(cntr) (cntr * 2) argument
45 #define CTCR_ARM_TIMER_EN_MASK(cntr) (1 << CTCR_ARM_TIMER_EN_OFFS) argument
46 #define CTCR_ARM_TIMER_EN(cntr) (1 << CTCR_ARM_TIMER_EN_OFFS(cntr)) argument
47 #define CTCR_ARM_TIMER_DIS(cntr) (0 << CTCR_ARM_TIMER_EN_OFFS(cntr)) argument
49 #define CTCR_ARM_TIMER_AUTO_OFFS(cntr) ((cntr * 2) + 1) argument
50 #define CTCR_ARM_TIMER_AUTO_MASK(cntr) (1 << 1) argument
51 #define CTCR_ARM_TIMER_AUTO_EN(cntr) (1 << CTCR_ARM_TIMER_AUTO_OFFS(cntr)) argument
52 #define CTCR_ARM_TIMER_AUTO_DIS(cntr) (0 << CTCR_ARM_TIMER_AUTO_OFFS(cntr)) argument
/external/ltp/testcases/kernel/syscalls/eventfd2/
Deventfd2_03.c60 u_int64_t cntr; in xsem_wait() local
62 if (read(fd, &cntr, sizeof(cntr)) != sizeof(cntr)) { in xsem_wait()
67 getpid(), fd, cntr); in xsem_wait()
72 u_int64_t cntr = count; in xsem_post() local
74 if (write(fd, &cntr, sizeof(cntr)) != sizeof(cntr)) { in xsem_post()
/external/brotli/scripts/dictionary/
Dstep-04-generate-java-literals.py27 cntr = skip_flip_offset variable
33 cntr += 1
36 hi.append(unichr(cntr))
37 cntr = skip_flip_offset + 1 variable
40 cntr += 1
43 hi.append(unichr(cntr))
44 cntr = skip_flip_offset + 1 variable
45 hi.append(unichr(cntr))
/external/epid-sdk/ext/ipp/sources/ippcp/
Dpcptool.h268 Ipp64u cntr; in ompStdIncrement64() local
274 ( ( Ipp8u* )&cntr )[k] = ( ( Ipp8u* )pInitCtrVal )[7 - k]; in ompStdIncrement64()
277 ( ( Ipp8u* )&cntr )[k] = ( ( Ipp8u* )pInitCtrVal )[k]; in ompStdIncrement64()
282 cntr += ( Ipp64u )n; in ompStdIncrement64()
287 Ipp64u save = cntr & ( ~mask ); in ompStdIncrement64()
290 temp = cntr & mask; in ompStdIncrement64()
291 cntr = temp + ( Ipp64u )n; in ompStdIncrement64()
293 if( cntr > bndr ) in ompStdIncrement64()
299 cntr = ( Ipp64u )item; in ompStdIncrement64()
304 cntr = save | ( cntr & mask ); in ompStdIncrement64()
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/external/webrtc/webrtc/modules/audio_coding/codecs/isac/main/source/
Dencode_lpc_swb.c250 int16_t cntr; in WebRtcIsac_QuantizeUncorrLar() local
281 for(cntr = 0; cntr < UB_LPC_ORDER * interVecDim; cntr++) in WebRtcIsac_QuantizeUncorrLar()
283 idx = (int32_t)floor((*data - leftRecPoint[cntr]) / in WebRtcIsac_QuantizeUncorrLar()
289 else if(idx >= numQuantCell[cntr]) in WebRtcIsac_QuantizeUncorrLar()
291 idx = numQuantCell[cntr] - 1; in WebRtcIsac_QuantizeUncorrLar()
294 *data++ = leftRecPoint[cntr] + idx * quantizationStepSize; in WebRtcIsac_QuantizeUncorrLar()
320 int16_t cntr; in WebRtcIsac_DequantizeLpcParam() local
349 for(cntr = 0; cntr < UB_LPC_ORDER * interVecDim; cntr++) in WebRtcIsac_DequantizeLpcParam()
351 *out++ = leftRecPoint[cntr] + *idx++ * quantizationStepSize; in WebRtcIsac_DequantizeLpcParam()
/external/webrtc/webrtc/modules/audio_coding/codecs/isac/main/util/
Dutility.h81 int cntr; \
82 for(cntr = 0; cntr < (len); cntr++) \
84 dummy[cntr] = (double)bufferPtr[cntr]; \
/external/mesa3d/src/mesa/state_tracker/
Dst_cb_perfmon.c94 struct st_perf_counter_object *cntr = in init_perf_monitor() local
97 cntr->id = cid; in init_perf_monitor()
98 cntr->group_id = gid; in init_perf_monitor()
100 cntr->batch_index = num_batch_counters; in init_perf_monitor()
103 cntr->query = pipe->create_query(pipe, stc->query_type, 0); in init_perf_monitor()
104 if (!cntr->query) in init_perf_monitor()
289 struct st_perf_counter_object *cntr = &stm->active_counters[i]; in st_GetPerfMonitorResult() local
294 cid = cntr->id; in st_GetPerfMonitorResult()
295 gid = cntr->group_id; in st_GetPerfMonitorResult()
298 if (cntr->query) { in st_GetPerfMonitorResult()
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/external/u-boot/drivers/timer/
Drockchip_timer.c31 uint64_t cntr; in rockchip_timer_get_curr_value() local
36 cntr = timebase_h << 32 | timebase_l; in rockchip_timer_get_curr_value()
37 return cntr; in rockchip_timer_get_curr_value()
91 uint64_t cntr = rockchip_timer_get_curr_value(priv->timer); in rockchip_timer_get_count() local
94 *count = ~0ull - cntr; in rockchip_timer_get_count()
/external/libavc/encoder/
Dih264e_core_coding.c324 UWORD32 cntr, u4_dc_cntrl; in ih264e_luma_16x16_idctrans_iquant_itrans_recon() local
331 for (cntr = 0; cntr < DC_COEFF_CNT_LUMA_MB; cntr++) in ih264e_luma_16x16_idctrans_iquant_itrans_recon()
333 u4_dc_cntrl |= ((pi2_src[cntr] != 0) << (15 - cntr)); in ih264e_luma_16x16_idctrans_iquant_itrans_recon()
651 UWORD32 cntr, u4_dc_cntrl; in ih264e_chroma_8x8_idctrans_iquant_itrans_recon() local
661 for (cntr = 0; cntr < 8; cntr++) in ih264e_chroma_8x8_idctrans_iquant_itrans_recon()
663 u4_dc_cntrl |= ((pi2_src[cntr] != 0) << (15 - cntr)); in ih264e_chroma_8x8_idctrans_iquant_itrans_recon()
Dih264e_utils.c405 WORD32 cntr; in ih264e_input_queue_update() local
414 for(cntr = 0; cntr < MAX_NUM_INP_FRAMES; cntr++) in ih264e_input_queue_update()
416 if(ps_inp_list[cntr].s_raw_buf.apv_bufs[0] != NULL) in ih264e_input_queue_update()
418 if ((ps_inp_list[cntr].u4_timestamp_high > u4_timestamp_high) || in ih264e_input_queue_update()
419 (ps_inp_list[cntr].u4_timestamp_high == u4_timestamp_high && in ih264e_input_queue_update()
420 ps_inp_list[cntr].u4_timestamp_low > u4_timestamp_low)) in ih264e_input_queue_update()
422 u4_timestamp_low = ps_inp_list[cntr].u4_timestamp_low; in ih264e_input_queue_update()
423 u4_timestamp_high = ps_inp_list[cntr].u4_timestamp_high; in ih264e_input_queue_update()
424 lst_bframe = cntr; in ih264e_input_queue_update()
/external/u-boot/drivers/net/
Ddavinci_emac.c324 unsigned long cntr = 0; in gen_auto_negotiate() local
364 cntr++; in gen_auto_negotiate()
365 } while (cntr < 200); in gen_auto_negotiate()
/external/u-boot/arch/m68k/include/asm/
Dimmap_520x.h191 u16 cntr; /* 0x04 Count */ member
Dimmap_5235.h215 u16 cntr; /* 0x04 Count register */ member
Dimmap_5329.h122 u16 cntr; /* 0x04 Count register */ member
/external/u-boot/drivers/pci/
Dpcie_imx.c448 setbits_le32(&gpc_regs->cntr, PCIE_PHY_PUP_REQ); in imx6_pcie_assert_core_reset()
/external/libhevc/common/arm/
Dihevc_resi_trans_32x32_a9q.s150 @R8 loop cntr
795 ADD R8,R8,#2 @increment loop cntr
796 CMP R8,#32 @check loop cntr
1229 ADD R8,R8,#1 @increment loop cntr by 2 since we process loop as 2 cols
1230 CMP R8,#32 @check loop cntr
Dihevc_resi_trans.s982 @R8 loop cntr
1307 ADD R8,R8,#2 @increment loop cntr
1308 CMP R8,#16 @check lllop cntr
1616 ADD R8,R8,#2 @increment loop cntr by 2 since we process loop as 2 cols
1617 CMP R8,#16 @check loop cntr
/external/u-boot/arch/arm/include/asm/arch-mx6/
Dimx-regs.h591 u32 cntr; member
/external/clang/test/
Dcxx-sections.data675 20.8.5.2 [allocator.adaptor.cntr]
676 20.8.5.3 [allocator.adaptor2.cntr]
/external/clang/test/SemaCXX/
Dwarn-thread-safety-analysis.cpp4695 MyContainer<int> cntr GUARDED_BY(mu);
4733 …for (int i : cntr) { // expected-warning2 {{reading variable 'cntr' requires holding mutex 'mu'}} in for_test()