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Searched refs:concontrol (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Ddmc_init_ddr3.c73 writel(mem->concontrol | (mem->rd_fetch << CONCONTROL_RD_FETCH_SHIFT) in ddr3_mem_ctrl_init()
75 &dmc->concontrol); in ddr3_mem_ctrl_init()
104 writel(mem->concontrol | (mem->rd_fetch << CONCONTROL_RD_FETCH_SHIFT), in ddr3_mem_ctrl_init()
105 &dmc->concontrol); in ddr3_mem_ctrl_init()
220 writel(mem->concontrol | (mem->rd_fetch << CONCONTROL_RD_FETCH_SHIFT) in ddr3_mem_ctrl_init()
221 | (mem->aref_en << CONCONTROL_AREF_EN_SHIFT), &dmc->concontrol); in ddr3_mem_ctrl_init()
548 writel(mem->concontrol | in ddr3_mem_ctrl_init()
551 &drex0->concontrol); in ddr3_mem_ctrl_init()
552 writel(mem->concontrol | in ddr3_mem_ctrl_init()
555 &drex1->concontrol); in ddr3_mem_ctrl_init()
[all …]
Ddmc_init_exynos4.c43 .concontrol = CONCONTROL_VAL,
113 writel(mem.concontrol, &dmc->concontrol); in dmc_init()
165 writel((mem.concontrol | AREF_EN), &dmc->concontrol); in dmc_init()
Dclock_init.h128 unsigned concontrol; member
Dclock_init_exynos5.c250 .concontrol = DMC_CONCONTROL_DFI_INIT_START_DISABLE |
355 .concontrol = DMC_CONCONTROL_DFI_INIT_START_DISABLE |
458 .concontrol = DMC_CONCONTROL_DFI_INIT_START_DISABLE |
Dexynos4_setup.h415 unsigned concontrol; member
/external/u-boot/arch/arm/mach-exynos/include/mach/
Ddmc.h6 unsigned int concontrol; member
115 unsigned int concontrol; member
209 unsigned int concontrol; member