Searched refs:config_2 (Results 1 – 14 of 14) sorted by relevance
/external/u-boot/board/freescale/corenet_ds/ |
D | p4080ds_ddr.c | 83 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, 115 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, 147 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, 179 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, 211 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, 243 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, 275 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, 307 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
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/external/u-boot/drivers/ddr/fsl/ |
D | arm_ddr_gen3.c | 72 ddr_out32(&ddr->cs0_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() 77 ddr_out32(&ddr->cs1_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() 82 ddr_out32(&ddr->cs2_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() 87 ddr_out32(&ddr->cs3_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
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D | mpc85xx_ddr_gen3.c | 95 out_be32(&ddr->cs0_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() 100 out_be32(&ddr->cs1_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() 105 out_be32(&ddr->cs2_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() 110 out_be32(&ddr->cs3_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
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D | fsl_ddr_gen4.c | 121 ddr_out32(&ddr->cs0_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() 131 ddr_out32(&ddr->cs1_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() 141 ddr_out32(&ddr->cs2_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs() 151 ddr_out32(&ddr->cs3_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
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D | interactive.c | 612 CFG_REGS_CS(0, config_2), in print_fsl_memctl_config_regs() 616 CFG_REGS_CS(1, config_2), in print_fsl_memctl_config_regs() 621 CFG_REGS_CS(2, config_2), in print_fsl_memctl_config_regs() 626 CFG_REGS_CS(3, config_2), in print_fsl_memctl_config_regs() 703 CFG_REGS_CS(0, config_2), in fsl_ddr_regs_edit() 707 CFG_REGS_CS(1, config_2), in fsl_ddr_regs_edit() 712 CFG_REGS_CS(2, config_2), in fsl_ddr_regs_edit() 717 CFG_REGS_CS(3, config_2), in fsl_ddr_regs_edit()
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D | ctrl_regs.c | 253 ddr->cs[i].config_2 = ((pasr_cfg & 7) << 24); in set_csn_config_2() 254 debug("FSLDDR: cs[%d]_config_2 = 0x%08x\n", i, ddr->cs[i].config_2); in set_csn_config_2()
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/external/u-boot/board/freescale/p1_twr/ |
D | ddr.c | 24 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, in fixed_sdram() 28 .cs[1].config_2 = CONFIG_SYS_DDR_CS1_CONFIG_2, in fixed_sdram()
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/external/u-boot/board/freescale/ls1043ardb/ |
D | ddr.h | 54 .cs[0].config_2 = 0, 56 .cs[1].config_2 = 0,
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/external/u-boot/board/Arcturus/ucp1020/ |
D | ddr.c | 84 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, in fixed_sdram() 88 .cs[1].config_2 = CONFIG_SYS_DDR_CS1_CONFIG_2, in fixed_sdram()
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/external/u-boot/board/freescale/bsc9132qds/ |
D | ddr.c | 20 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, 47 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
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/external/u-boot/board/freescale/p1010rdb/ |
D | ddr.c | 23 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, 50 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
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/external/u-boot/board/freescale/p1_p2_rdb_pc/ |
D | ddr.c | 216 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, in fixed_sdram() 220 .cs[1].config_2 = CONFIG_SYS_DDR_CS1_CONFIG_2, in fixed_sdram()
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/external/u-boot/board/freescale/bsc9131rdb/ |
D | ddr.c | 21 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
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/external/u-boot/include/ |
D | fsl_ddr_sdram.h | 246 unsigned int config_2; member
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