| /external/mesa3d/src/compiler/glsl/ |
| D | lower_ubo_reference.cpp | 63 unsigned *const_offset,
275 unsigned *const_offset, in setup_for_load_or_store() argument
314 *const_offset = 0; in setup_for_load_or_store()
316 *const_offset = blocks[i]->Uniforms[var->data.location].Offset; in setup_for_load_or_store()
326 setup_buffer_access(mem_ctx, deref, offset, const_offset, row_major, in setup_for_load_or_store()
347 unsigned const_offset; in handle_rvalue() local
364 &offset, &const_offset, in handle_rvalue()
385 emit_access(mem_ctx, false, deref, load_offset, const_offset, in handle_rvalue()
563 unsigned const_offset; in write_to_memory() local
578 &offset, &const_offset, in write_to_memory()
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| D | lower_shared_reference.cpp | 138 unsigned const_offset = get_shared_offset(var); in handle_rvalue() local
145 &offset, &const_offset, in handle_rvalue()
165 emit_access(mem_ctx, false, deref, load_offset, const_offset, row_major, in handle_rvalue()
206 unsigned const_offset = get_shared_offset(var); in handle_assignment() local
213 &offset, &const_offset, in handle_assignment()
225 emit_access(mem_ctx, true, deref, store_offset, const_offset, row_major, in handle_assignment()
365 unsigned const_offset = get_shared_offset(var); in lower_shared_atomic_intrinsic() local
373 &offset, &const_offset, in lower_shared_atomic_intrinsic()
381 add(offset, new(mem_ctx) ir_constant(const_offset)); in lower_shared_atomic_intrinsic()
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| D | lower_buffer_access.cpp | 276 unsigned *const_offset, in setup_buffer_access() argument
359 *const_offset += array_stride * const_index->value.u[0]; in setup_buffer_access()
424 *const_offset += intra_struct_offset; in setup_buffer_access()
434 *const_offset += deref_swizzle->mask.x * sizeof(int); in setup_buffer_access()
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| D | lower_buffer_access.h | 58 ir_rvalue **offset, unsigned *const_offset,
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_vec4_nir.cpp | 386 nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); in nir_emit_intrinsic() local
389 assert(const_offset); in nir_emit_intrinsic()
394 src = src_reg(ATTR, instr->const_index[0] + const_offset->u32[0], in nir_emit_intrinsic()
413 nir_const_value *const_offset = nir_src_as_const_value(instr->src[1]); in nir_emit_intrinsic() local
414 assert(const_offset); in nir_emit_intrinsic()
416 int varying = instr->const_index[0] + const_offset->u32[0]; in nir_emit_intrinsic()
501 nir_const_value *const_offset = nir_src_as_const_value(instr->src[2]); in nir_emit_intrinsic() local
502 if (const_offset) { in nir_emit_intrinsic()
503 offset_reg = brw_imm_ud(const_offset->u32[0]); in nir_emit_intrinsic()
666 nir_const_value *const_offset = nir_src_as_const_value(instr->src[1]); in nir_emit_intrinsic() local
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| D | brw_fs_nir.cpp | 2419 nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); in nir_emit_vs_intrinsic() local
2420 assert(const_offset && "Indirect input loads not allowed"); in nir_emit_vs_intrinsic()
2421 src = offset(src, bld, const_offset->u32[0]); in nir_emit_vs_intrinsic()
3242 const nir_const_value *const_offset = nir_src_as_const_value(instr->src[1]); in nir_emit_fs_intrinsic() local
3243 assert(const_offset && "Indirect output stores not allowed"); in nir_emit_fs_intrinsic()
3245 SET_FIELD(const_offset->u32[0], BRW_NIR_FRAG_OUTPUT_LOCATION); in nir_emit_fs_intrinsic()
3260 nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); in nir_emit_fs_intrinsic() local
3261 assert(const_offset && "Indirect output loads not allowed"); in nir_emit_fs_intrinsic()
3262 const unsigned target = l - FRAG_RESULT_DATA0 + const_offset->u32[0]; in nir_emit_fs_intrinsic()
3420 nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); in nir_emit_fs_intrinsic() local
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| D | brw_nir.c | 72 nir_const_value *const_offset = nir_src_as_const_value(*offset); in add_const_offset_to_base_block() local
74 if (const_offset) { in add_const_offset_to_base_block()
75 intrin->const_index[0] += const_offset->u32[0]; in add_const_offset_to_base_block()
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| D | brw_fs.h | 94 uint32_t const_offset);
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| D | brw_fs.cpp | 167 uint32_t const_offset) in VARYING_PULL_CONSTANT_LOAD() argument
181 bld.ADD(vec4_offset, varying_offset, brw_imm_ud(const_offset & ~0xf)); in VARYING_PULL_CONSTANT_LOAD()
194 fs_reg dw = offset(vec4_result, bld, (const_offset & 0xf) / 4); in VARYING_PULL_CONSTANT_LOAD()
198 bld.MOV(dst, subscript(dw, dst.type, (const_offset / 2) & 1)); in VARYING_PULL_CONSTANT_LOAD()
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| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | ir3_compiler_nir.c | 1168 nir_const_value *const_offset; in emit_intrinsic_load_ubo() local
1189 const_offset = nir_src_as_const_value(intr->src[1]); in emit_intrinsic_load_ubo()
1190 if (const_offset) { in emit_intrinsic_load_ubo()
1191 off += const_offset->u32[0]; in emit_intrinsic_load_ubo()
1240 nir_const_value *const_offset; in emit_intrinsic_load_ssbo() local
1243 const_offset = nir_src_as_const_value(intr->src[0]); in emit_intrinsic_load_ssbo()
1244 compile_assert(ctx, const_offset); in emit_intrinsic_load_ssbo()
1255 ldgb = ir3_LDGB(b, create_immed(b, const_offset->u32[0]), 0, in emit_intrinsic_load_ssbo()
1273 nir_const_value *const_offset; in emit_intrinsic_store_ssbo() local
1282 const_offset = nir_src_as_const_value(intr->src[1]); in emit_intrinsic_store_ssbo()
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | gen6_constant_state.c | 251 uint32_t const_offset; in brw_upload_pull_constants() local
253 &const_bo, &const_offset); in brw_upload_pull_constants()
270 const_bo, const_offset, in brw_upload_pull_constants()
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| /external/mesa3d/src/broadcom/compiler/ |
| D | nir_to_vir.c | 1432 nir_const_value *const_offset; in ntq_emit_intrinsic() local
1438 const_offset = nir_src_as_const_value(instr->src[0]); in ntq_emit_intrinsic()
1439 if (const_offset) { in ntq_emit_intrinsic()
1440 offset = nir_intrinsic_base(instr) + const_offset->u32[0]; in ntq_emit_intrinsic()
1471 const_offset = nir_src_as_const_value(instr->src[0]); in ntq_emit_intrinsic()
1472 if (const_offset) { in ntq_emit_intrinsic()
1473 offset = nir_intrinsic_base(instr) + const_offset->u32[0]; in ntq_emit_intrinsic()
1524 const_offset = nir_src_as_const_value(instr->src[0]); in ntq_emit_intrinsic()
1525 assert(const_offset && "v3d doesn't support indirect inputs"); in ntq_emit_intrinsic()
1527 offset = nir_intrinsic_base(instr) + const_offset->u32[0]; in ntq_emit_intrinsic()
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| /external/mesa3d/src/gallium/drivers/vc4/ |
| D | vc4_program.c | 1739 nir_const_value *const_offset = nir_src_as_const_value(instr->src[0]); in ntq_emit_load_input() local
1740 assert(const_offset && "vc4 doesn't support indirect inputs"); in ntq_emit_load_input()
1748 uint32_t offset = nir_intrinsic_base(instr) + const_offset->u32[0]; in ntq_emit_load_input()
1757 nir_const_value *const_offset; in ntq_emit_intrinsic() local
1763 const_offset = nir_src_as_const_value(instr->src[0]); in ntq_emit_intrinsic()
1764 if (const_offset) { in ntq_emit_intrinsic()
1765 offset = nir_intrinsic_base(instr) + const_offset->u32[0]; in ntq_emit_intrinsic()
1835 const_offset = nir_src_as_const_value(instr->src[1]); in ntq_emit_intrinsic()
1836 assert(const_offset && "vc4 doesn't support indirect outputs"); in ntq_emit_intrinsic()
1837 offset = nir_intrinsic_base(instr) + const_offset->u32[0]; in ntq_emit_intrinsic()
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_glsl_to_tgsi.cpp | 1946 unsigned const_offset = const_offset_ir ? in visit_expression() local
1966 cbuf.index = const_offset / 16; in visit_expression()
1989 const_offset = const_offset_ir->value.u[0]; in visit_expression()
1990 cbuf.index = const_offset / 16; in visit_expression()
2015 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 8, in visit_expression()
2016 const_offset % 16 / 8, in visit_expression()
2017 const_offset % 16 / 8, in visit_expression()
2018 const_offset % 16 / 8); in visit_expression()
2020 cbuf.swizzle += MAKE_SWIZZLE4(const_offset % 16 / 4, in visit_expression()
2021 const_offset % 16 / 4, in visit_expression()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_state.h | 346 const uint8_t *ptr, unsigned size, uint32_t *const_offset);
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| D | si_descriptors.c | 1121 const uint8_t *ptr, unsigned size, uint32_t *const_offset) in si_upload_const_buffer() argument
1127 const_offset, in si_upload_const_buffer()
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| /external/mesa3d/src/amd/common/ |
| D | ac_nir_to_llvm.c | 2700 unsigned const_offset = 0; in get_deref_offset() local
2726 const_offset = deref_array->base_offset; in get_deref_offset()
2739 const_offset += size * deref_array->base_offset; in get_deref_offset()
2757 const_offset += glsl_count_attribute_slots(ft, vs_in); in get_deref_offset()
2764 if (const_offset && offset) in get_deref_offset()
2766 LLVMConstInt(ctx->ac.i32, const_offset, 0), in get_deref_offset()
2769 *const_out = const_offset; in get_deref_offset()
5113 nir_const_value *const_offset = in visit_tex() local
5116 assert(const_offset); in visit_tex()
5120 address[2], LLVMConstInt(ctx->ac.i32, const_offset->i32[2], false), ""); in visit_tex()
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| /external/v8/src/ |
| D | code-stub-assembler.cc | 2678 int const_offset; in StoreObjectField() local
2679 if (ToInt32Constant(offset, const_offset)) { in StoreObjectField()
2680 return StoreObjectField(object, const_offset, value); in StoreObjectField()
2694 int const_offset; in StoreObjectFieldNoWriteBarrier() local
2695 if (ToInt32Constant(offset, const_offset)) { in StoreObjectFieldNoWriteBarrier()
2696 return StoreObjectFieldNoWriteBarrier(object, const_offset, value, rep); in StoreObjectFieldNoWriteBarrier()
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